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CXL-SSD Archetype Routing — Simulation Results
Stage-00 snapshot (2026-05-02) of all simulator outputs produced for the CXL-SSD page-oriented embedding lookup paper.
Includes:
- MQSim
Results/overall.txt,latency_result.txtper layout × ratio × mode - Cylon FEMU benchmark CSVs (MIO latency, throughput, cache scan)
- MaxEmbed evaluation matrices
- COG / SeedExpand / BQP partition outputs
Each subdirectory groups one experiment family. Logs are kept beside
metrics; raw .crdownload and very large logs are deduplicated.
Companion repos
| Component | URL |
|---|---|
| Outer paper repo | https://github.com/shadowcollecter/cxlssd-archetype-routing |
| Cylon-full | https://github.com/shadowcollecter/cylon-full-paper |
| MQSim-CXL fork | https://github.com/shadowcollecter/mqsim-cxl-paper |
| MaxEmbed | https://github.com/shadowcollecter/maxembed-paper |
License
CC-BY-NC-4.0 for academic reproducibility. Cite the corresponding paper when using these results.
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