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hexa-antimatter | ARCHITECTURE.md | md | # Architecture — hexa-antimatter
> The lay-of-the-land doc. How the repo is structured, why each layer exists,
> what reads what, and where the abstraction boundaries are. Read this before
> trying to add a new substrate or to navigate to a specific evidence tier.
---
## §1 The 6-layer architecture
```
┌─────────... | 12,595 | 3,148 | 19ac83eecc6bad1e |
hexa-antimatter | CHANGELOG.md | md | # Changelog
All notable changes to `hexa-antimatter` will be documented in this file.
The format is based on [Keep a Changelog](https://keepachangelog.com/en/1.1.0/),
and this project adheres to [Semantic Versioning](https://semver.org/spec/v2.0.0.html).
---
## [Unreleased]
### Added (2026-05-08 — Phase C.5 + Phas... | 34,654 | 8,663 | 1817620cbd25dc7f |
hexa-antimatter | FAQ.md | md | # FAQ — hexa-antimatter
> Quick answers to the most common questions. Cross-reference in
> `CONTRIBUTING.md`, `ARCHITECTURE.md`, and the per-pillar SSOTs.
---
## Repository scope
### Q1. Does this repo synthesize anti-hydrogen?
**No.** This is a substrate spec — paper specifications + closed-form algebra + numeri... | 6,691 | 1,672 | dff370a41fbc2b6b |
hexa-antimatter | README.md | md | # ☄️ hexa-antimatter
> 반물질 substrate — antimatter-factory + tabletop + PET cyclotron. n=6 Dirac-mirror lattice.
[](https://doi.org/10.5281/zenodo.20077465)
[](LICENSE)
[; RSC closure cycle 2026-05-07/08
**License**: MIT
**Tag**: `v1.1.0`
---
## Summary
`hexa-antimatter` v1.1.0 is the **RSC (Runnable Surface Construction) closu... | 7,975 | 1,993 | 2fbc856294ac40f5 |
hexa-antimatter | RELEASE_NOTES_v1.0.0.md | md | # hexa-antimatter v1.0.0 — initial extraction
**Release date**: 2026-05-06
**Provenance**: `canon` SHA `c0f1f570`
**License**: MIT
---
## Summary
`hexa-antimatter` v1.0.0 is the initial standalone extraction of the antimatter
substrate from `canon/domains/physics/` into a public GitHub repo
under the `dancinlab` or... | 2,309 | 577 | 2f836c25593bc467 |
hexa-antimatter | CONTRIBUTING.md | md | # Contributing to hexa-antimatter
> **Scope reminder**: this repo is a **substrate spec**, not an experimental rig.
> No working apparatus, no anti-H synthesis, no clinical PET, no live p̄ capture
> happens here. The verification surface is **closed-form algebra + numerical
> parity + sim-firmware + paper-feed (INSPI... | 4,520 | 1,130 | ebd0117ecc0f9de8 |
hexa-antimatter | SECURITY.md | md | # Security policy — hexa-antimatter
> This is a **substrate-spec repo**, not an operational system. No live
> services, no telemetry endpoints, no auth flow. The security surface
> is therefore narrow but real.
---
## §1 Threat model
What this repo *can* be attacked:
- **Supply-chain compromise of `.hexa` runtim... | 3,149 | 787 | 5b0530527103d0ba |
hexa-antimatter | firmware/kicad/README.md | md | # `firmware/kicad/` — Phase E KiCad source skeleton
> §A.6.1 Phase E scope. Per-board KiCad 8.0+ project structure.
> **Empty trees** (no `.kicad_sch` / `.kicad_pcb` files) — Phase E
> is a funding-gated step (~$225k for 4-board prototype run).
**Status**: skeleton dirs only (2026-05-08) · **Boards in hand**: ✗
---... | 2,635 | 658 | d666229c2cc33e0c |
hexa-antimatter | firmware/kicad/tabletop_penning/README.md | md | # `firmware/kicad/tabletop_penning/` — Phase E project (HEXA-TABLETOP-FW-01)
> KiCad 8.0+ project for board v0 of `tabletop_penning`. **Empty** —
> Phase E is funding-gated. See `../README.md` for context.
**Status**: empty (2026-05-08) · **Funding gate**: §A.6 step 2 · **Phase E sub-stage**: E2 (mid-complexity)
-... | 3,105 | 776 | b80b1f789697913a |
hexa-antimatter | firmware/kicad/atomic_clock/README.md | md | # `firmware/kicad/atomic_clock/` — Phase E project (HEXA-FACTORY-FW-01 CPT bench)
> KiCad 8.0+ project for board v0 of `atomic_clock`. **Empty** —
> Phase E is funding-gated. See `../README.md` for context.
**Status**: empty (2026-05-08) · **Funding gate**: §A.6 step 2 · **Phase E sub-stage**: E1 (small-mid, second... | 3,500 | 875 | a72b768badca1b3e |
hexa-antimatter | firmware/kicad/thrust_acquisition/README.md | md | # `firmware/kicad/thrust_acquisition/` — Phase E project (HEXA-PROPULSION-FW-01)
> KiCad 8.0+ project for board v0 of `thrust_acquisition`. **Empty** —
> Phase E is funding-gated. See `../README.md` for context.
**Status**: empty (2026-05-08) · **Funding gate**: §A.6 step 2 · **Phase E sub-stage**: E3 (highest comp... | 4,424 | 1,106 | bf2c7466be965f08 |
hexa-antimatter | firmware/kicad/pet_cyclotron/README.md | md | # `firmware/kicad/pet_cyclotron/` — Phase E project (HEXA-PET-FW-01)
> KiCad 8.0+ project for board v0 of `pet_cyclotron`. **Empty** —
> Phase E is funding-gated. See `../README.md` for context.
**Status**: empty (2026-05-08) · **Funding gate**: §A.6 step 2 · **Phase E sub-stage**: E1 (smallest board → recommended ... | 2,970 | 742 | cea4aabe440e0aff |
hexa-antimatter | firmware/doc/PHASE_E_HARDWARE_PATH.md | md | # Phase E — Hardware Path (KiCad → fab → bring-up)
> Phase E lives **outside the .hexa code surface**. Per recipe §9, code-layer
> closure (sat-1 + sat-2 + sat-3) is complete at v1.1.0; remaining steps are
> hardware/ops events that cannot be unblocked by additional `.hexa` files.
>
> This document is the **paper roa... | 11,915 | 2,978 | 6281f1d15a13f508 |
hexa-antimatter | firmware/doc/board_v0_thrust_acquisition.md | md | # board_v0 — thrust acquisition (HEXA-PROPULSION-FW-01)
> Phase C.5 board-spec doc for **F-AM-4**. 16-channel waveform digitizer
> + Watt-balance ADC + BGO calorimeter trigger + pion ToF gate. Sub-ns
> trigger fan-out for coincidence-class p̄ annihilation events.
**Status**: paper board v0 (2026-05-08) · **Sim-firm... | 7,684 | 1,921 | 69375dcf04091054 |
hexa-antimatter | firmware/doc/phase_e_test_report_template.md | md | # Phase E — bench-test report template
> Per-board bring-up + sim-parity report. Filled in by the lab team
> when a Phase E board reaches the bench. Empty template — copy + edit
> per delivered board.
---
## Board identification
| Field | Value |
|:------|:------|
| Board name | (e.g., HEXA-PET-FW-01) |
| Source ... | 3,078 | 769 | ba35ea9359bf1542 |
hexa-antimatter | firmware/doc/phase_e_procurement.md | md | # Phase E — procurement + receiving log (HEXA-FIRMWARE-PHASE-E-03)
> Tracks SKU procurement progression for the 4 board v0 BOMs.
> Every line item from `firmware/doc/board_v0_*.md §4` flows here when
> ordered. No PO has been issued; this is the empty schema.
**Status**: empty (2026-05-08) · **First PO**: TBD (post-... | 5,096 | 1,274 | 67c83d90cb680f53 |
hexa-antimatter | firmware/doc/schematic_v0_thrust_acquisition.md | md | # schematic_v0 — thrust acquisition (HEXA-PROPULSION-FW-01)
> Phase C.5 schematic block-spec for **F-AM-4**. 16-channel waveform
> digitizer (12-bit @ 10 GS/s per ch via JESD204C) + Watt-balance
> 24-bit ADC + BGO/ToF coincidence trigger + DDR4 burst buffer +
> PCIe Gen4 ×16 to host. XCVU13P FPGA centerpiece.
**Sta... | 9,610 | 2,402 | 3f6169afe545d039 |
hexa-antimatter | firmware/doc/phase_e_kicad_plan.md | md | # Phase E — KiCad project plan (HEXA-FIRMWARE-PHASE-E-01)
> §A.6.1 Phase E plan. Real KiCad sources for the 4 board v0 specs.
> Written before any procurement to make funding cost-out auditable;
> no `.kicad_pcb` / Gerber files exist yet.
**Status**: paper plan (2026-05-08) · **Boards in hand**: ✗ · **Funding**: pre... | 7,064 | 1,766 | 86bd07cf2773c39a |
hexa-antimatter | firmware/doc/schematic_v0_pet_cyclotron.md | md | # schematic_v0 — PET cyclotron controller (HEXA-PET-FW-01)
> Phase C.5 schematic block-spec for **F-AM-1**. Companion to
> `board_v0_pet_cyclotron.md` (BOM + pinout); this file specifies the
> KiCad-ready block diagram, net topology, power tree, and PCB layout
> hints. No `.kicad_sch` file yet — this MD is the canon... | 8,249 | 2,062 | 7334c772821e5c5e |
hexa-antimatter | firmware/doc/schematic_v0_tabletop_penning.md | md | # schematic_v0 — tabletop Penning RF (HEXA-TABLETOP-FW-01)
> Phase C.5 schematic block-spec for **F-AM-2**. XCZU9EG MPSoC + AD9162
> DAC + AD9208 ADC + AD9528 clock + RS-485 CERN AD handshake + cryo
> safety chain. Companion to `board_v0_tabletop_penning.md`.
**Status**: paper schematic v0 (2026-05-08) · **Sim**: p... | 8,823 | 2,205 | 8379a68cc7fc9342 |
hexa-antimatter | firmware/doc/README.md | md | # `firmware/` — sim + board specs + Phase D scaffolding + Phase E plans
> §A.6.1 Phase C + C.5 + D + E scope. Five layers:
> · `sim/` — Phase C behavioral sim (golden spec, 4 boards)
> · `doc/board_v0_*.md` + `doc/schematic_v0_*.md` — Phase C.5 board-spec (pinout + BOM + power + bring-up + block schematic)
> ·... | 6,376 | 1,594 | eb4a43a8e9e80718 |
hexa-antimatter | firmware/doc/phase_e_pcb_plan.md | md | # Phase E — PCB layout + fabrication plan (HEXA-FIRMWARE-PHASE-E-02)
> Companion to `phase_e_kicad_plan.md`. Specifies the post-schematic
> route from KiCad PCB editor → fab vendor → assembled board on
> bench. No PCBs exist yet; this is the cost/time/quality contract.
**Status**: paper plan (2026-05-08) · **First ... | 5,082 | 1,270 | e6f36172ac42716f |
hexa-antimatter | firmware/doc/board_v0_atomic_clock.md | md | # board_v0 — atomic clock counter (HEXA-FACTORY-FW-01, CPT bench)
> Phase C.5 board-spec doc for **F-AM-3**. Precision ν_c counter +
> 1S-2S laser lock + Cs reference disciplining. Sub-ppb timing.
**Status**: paper board v0 (2026-05-08) · **Sim-firmware**: `firmware/sim/atomic_clock_counter.hexa` (11/11 PASS) · **P... | 6,909 | 1,727 | c0649e195a794048 |
hexa-antimatter | firmware/doc/board_v0_pet_cyclotron.md | md | # board_v0 — PET cyclotron controller (HEXA-PET-FW-01)
> Phase C.5 board-spec doc for **F-AM-1**. Bridges Phase A BOM
> (`pet_cyclotron/doc/benchtop_v0_design.md`) and Phase D HDL/MCU
> skeletons (`firmware/{hdl,mcu}/`). Paper specification only;
> no PCB exists.
**Status**: paper board v0 (2026-05-08) · **Sim-firm... | 8,573 | 2,143 | 06c15c9f6556154c |
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