| # Iterating on top level floorplan with macro pin constraints |
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| Tool: Initialize Floorplan |
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| Subcategory: Flow customization |
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| ## Conversation |
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| ### oharboe |
| I would like to iterate on the floorplan of the top level of our design. In doing so, I want to change the pin constraints for the macros used at the top level.
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| However, ```make generate_abstract``` goes all the way to detailed routing before producing a .gds, .lef and .lib file. This takes a long time.
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| Is there a way to run generate_abstract after IO pin placement on the macro without going through detailed route?
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| ### maliberty |
| The flow itself doesn't have a mechanism but the command should work at that point (though it hasn't been tested). You could add a flow option if needed. |
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| ### oharboe |
| Solution implemented: `make skip_cts skip_route generate_abstract` |
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