| # how to fix metal spacing DRCs |
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| Tool: Detailed Routing |
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| Subcategory: DRC violation |
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| ## Conversation |
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| ### gkamendje |
| After 64 iterations DRT stopped on my design a generated a DRC report. It turns out that most of the DRC are related to METAL1 spacing (with net VSS) and Metal SpacingTableTw. The design is not very congested so I wonder why the tool could not fix these rules. Could it be that I am missing something here (maybe something in my platform definition)? Is there a way to fix these violations?
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| ### maliberty |
| Can you provide a test case? |
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| ### maliberty |
| You have very wide METAL1 power stripes:
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| The pin is less than the min space (0.19 < 0.23) from the stripe so there is always going to be a DRC error here. You need to adjust your PDN definition to be resolve this. |
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