Datasets:

Si7li
/

ltspice-spice-circuits

netlist stringlengths 130 162k	asc stringlengths 203 205k
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3405A.asc * Generated by LTspice 26.0.1 for Windows. V1 IN 0 5 C1 OUT 0 22 C2 OUT N002 20p L1 N001 OUT 4.7 R1 OUT N002 887K R2 N002 0 280K Rload OUT 0 10 XU1 IN 0 N001 IN N002 0 LTC3405A ;pnba Run)GND)SW)Vin)FB)Mode .tran 1m startup * Library below included based on Mod...	Version 4 SHEET 1 1072 724 WIRE 192 64 80 64 WIRE 352 64 192 64 WIRE 80 80 80 64 WIRE 352 80 352 64 WIRE 192 144 192 64 WIRE 208 144 192 144 WIRE 512 144 496 144 WIRE 624 144 592 144 WIRE 720 144 624 144 WIRE 832 144 720 144 WIRE 944 144 832 144 WIRE 832 160 832 144 WIRE 944 160 944 144 WIRE 80 176 80 160 WIRE 624 192 ...
* Z:\home\khalils\Downloads\files\data\raw_asc\30d5b5a90604_one_stage_MFB.asc * Generated by LTspice 26.0.1 for Windows. * Library below included based on ModelFile attribute of instance XU2, XU3, XU4 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\UniversalOpAmp.asy) C5 N008 N004 {Cs} V3 N010 N009 AC 1 V2 N009 ...	Version 4 SHEET 1 952 984 WIRE -256 320 -1008 320 WIRE 464 320 -256 320 WIRE 784 320 464 320 WIRE -1008 352 -1008 320 WIRE -352 480 -512 480 WIRE -144 480 -288 480 WIRE 368 480 208 480 WIRE 576 480 432 480 WIRE 896 496 896 464 WIRE 896 576 704 576 WIRE -368 592 -400 592 WIRE -144 592 -144 480 WIRE -144 592 -288 592 WIR...
* Z:\home\khalils\Downloads\files\data\raw_asc\2b840e5c1097_l5.asc * Generated by LTspice 26.0.1 for Windows. * Library below included based on ModelFile attribute of instance XU2, XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8505.asy) R2 Uoutamp 1IN- 10k V3 0 Uee 5 XU2 2IN+ 2IN- V+ 0 G AD8505 ;pnba In+...	Version 4 SHEET 1 2324 1084 WIRE 512 16 464 16 WIRE 640 16 592 16 WIRE 544 112 544 96 WIRE 544 160 544 112 WIRE 336 176 304 176 WIRE 464 176 464 16 WIRE 464 176 416 176 WIRE 496 176 464 176 WIRE 512 176 496 176 WIRE 640 192 640 16 WIRE 640 192 576 192 WIRE 768 192 640 192 WIRE 496 208 480 208 WIRE 512 208 496 208 WIRE ...
* Z:\home\khalils\Downloads\files\data\raw_asc\ADAQ4224.asc * Generated by LTspice 26.0.1 for Windows. * IN+, IN-: Analog inputs. Transients from sampling caps are simulated. Input range is +/-VREF * REF: For 5V VREF VDD should be 5.4V +/-100mV * VDD: For REF=4.096V VDD=4.75V to 5.25V For REF=4.5V VDD= 4.8V to 5.25V * ...	Version 4 SHEET 1 2100 788 WIRE -144 -432 -144 -480 WIRE -80 -336 -80 -480 WIRE 128 -336 128 -368 WIRE 448 -336 448 -368 WIRE 544 -336 544 -368 WIRE -144 -224 -144 -352 WIRE -80 -224 -80 -256 WIRE 128 -224 128 -256 WIRE 448 -224 448 -256 WIRE 544 -224 544 -256 WIRE -432 64 -560 64 WIRE -288 64 -352 64 WIRE 736 112 704 ...
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC6084.asc * Generated by LTspice 26.0.1 for Windows. * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LTC6084.asy) R2 N002 N001 10K V1 +V 0 2.5 XU1 0 N001 +V -V N002 NC_01 LTC6084 ;pnba IN+)IN-)V...	Version 4 SHEET 1 880 680 WIRE 224 32 112 32 WIRE 368 32 304 32 WIRE 208 112 208 96 WIRE 0 160 -64 160 WIRE 112 160 112 32 WIRE 112 160 80 160 WIRE 176 160 112 160 WIRE -64 176 -64 160 WIRE 368 192 368 32 WIRE 368 192 320 192 WIRE -320 224 -320 208 WIRE -224 224 -224 208 WIRE 176 224 144 224 WIRE -64 272 -64 256 WIRE 2...
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC3619.asc * Generated by LTspice 26.0.1 for Windows. * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC3619.asy) R1 OUT1 N004 511K L1 N002 OUT1 3.3 Rload2 OUT2 0 20 C3 N005 0 1000p V1 IN...	Version 4 SHEET 1 880 680 WIRE 32 -32 -96 -32 WIRE 176 -32 32 -32 WIRE 320 -32 176 -32 WIRE -96 -16 -96 -32 WIRE 176 -16 176 -32 WIRE 32 32 32 -32 WIRE 48 32 32 32 WIRE 320 32 320 -32 WIRE 320 32 304 32 WIRE -96 80 -96 64 WIRE -224 224 -352 224 WIRE -112 224 -224 224 WIRE -64 224 -112 224 WIRE 48 224 16 224 WIRE 320 22...
* Z:\home\khalils\Downloads\files\data\raw_asc\5790b99cb9cd_Draft1_simple.asc * Generated by LTspice 26.0.1 for Windows. D1 0 N002 1N4148 C1 N001 N002 {CC} V=X Rser=1m Lser=0 mfg=" ---" pn=" ---" type=" ---" V1 N001 0 SINE(0 6 5000) AC 0 Rser=50 D2 N002 N003 1N4148 D3 N003 N004 1N4148 D4 N004 N005 1N4148 D6 N006 N007 1...	Version 4 SHEET 1 2364 1048 WIRE 160 80 -32 80 WIRE 368 80 160 80 WIRE 368 144 368 80 WIRE 576 144 368 144 WIRE 784 144 576 144 WIRE 992 144 784 144 WIRE 1200 144 992 144 WIRE 160 160 160 80 WIRE 80 256 16 256 WIRE 160 256 160 224 WIRE 160 256 144 256 WIRE 192 256 160 256 WIRE 272 256 256 256 WIRE 288 256 272 256 WIRE ...
* Z:\home\khalils\Downloads\files\data\raw_asc\606830e3fc8b_comparator_logic_IE.asc * Generated by LTspice 26.0.1 for Windows. * magic output * motor 1 * motor 2 * Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001.asy) XU2 N005 N004 N0...	Version 4 SHEET 1 1540 1016 WIRE 896 -240 368 -240 WIRE 512 -80 208 -80 WIRE 512 -16 512 -80 WIRE 208 112 208 -80 WIRE 512 112 512 64 WIRE 752 112 512 112 WIRE 176 128 -48 128 WIRE 368 144 368 -240 WIRE 368 144 240 144 WIRE 176 160 80 160 WIRE -48 176 -48 128 WIRE 512 176 512 112 WIRE 896 320 896 -240 WIRE 1136 320 896...
* Z:\home\khalils\Downloads\files\data\raw_asc\8bb8b1ae6f8e_diffamp_res.asc * Generated by LTspice 26.0.1 for Windows. * .op * VDIFF_2 = -VDIFF_1 * .ac dec 100 1 100Mega * .tran 0 10 0 1m VDIFF_1 N003 0 PULSE(0 200u 1m 10m 0 10s) AC 200u M4 N001 N002 N002 N001 pmos_custom M6 VG_mirror VG_mirror 0 0 SQJ910AEP_Q2 V1 N005...	Version 4.1 SHEET 1 1020 708 WIRE 608 -176 160 -176 WIRE 720 -176 608 -176 WIRE 832 -176 800 -176 WIRE 832 -160 832 -176 WIRE 160 -144 160 -176 WIRE 160 -144 96 -144 WIRE 608 -144 608 -176 WIRE 672 -144 608 -144 WIRE 160 -128 160 -144 WIRE 608 -128 608 -144 WIRE 96 -80 96 -144 WIRE 160 -80 96 -80 WIRE 672 -80 672 -144 ...
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX38912.asc * Generated by LTspice 26.0.1 for Windows. V1 IN 0 2.1 C2 OUT N001 10n C3 OUT 0 4.7 R1 OUT 0 3.6 R2 OUT N003 604k R3 N003 0 301k XU1 IN OUT IN N003 N002 N001 IN 0 MAX38912 ;pnba IN)OUT)EN)FB)POK)BYP)MODE)GND R4 IN N002 100k .tran 0.8 startup * Library below in...	Version 4.1 SHEET 1 1988 1664 WIRE -80 1104 -144 1104 WIRE -32 1104 -80 1104 WIRE 80 1104 -32 1104 WIRE 96 1104 80 1104 WIRE 352 1104 320 1104 WIRE 432 1104 352 1104 WIRE 544 1104 432 1104 WIRE 592 1104 544 1104 WIRE 640 1104 592 1104 WIRE -144 1120 -144 1104 WIRE 352 1120 352 1104 WIRE 544 1120 544 1104 WIRE 640 1120 ...
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3008-3.3.asc * Generated by LTspice 26.0.1 for Windows. V1 IN 0 PWL(0 0 1 10) C1 OUT 0 1 Rload OUT 0 330 XU1 IN OUT OUT 0 IN LT3008-3.3 ;pnba IN)OUT)Sense)GND)_SHDN .tran 1 * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Lo...	Version 4 SHEET 1 880 680 WIRE 0 48 -208 48 WIRE 32 48 0 48 WIRE 352 48 320 48 WIRE 416 48 352 48 WIRE 512 48 416 48 WIRE -208 64 -208 48 WIRE 416 64 416 48 WIRE 512 64 512 48 WIRE 0 144 0 48 WIRE 32 144 0 144 WIRE 352 144 352 48 WIRE 352 144 320 144 WIRE -208 160 -208 144 WIRE 416 160 416 128 WIRE 512 160 512 144 WIRE...
* Z:\tmp\asc_dec_bjh7r6w2\0074b1740816_op_amp_dec2.asc * Generated by LTspice 26.0.1 for Windows. R6 N002 N001 33k XU1 N005 N001 Vcc -Vcc N003 level1 Avol=1Meg GBW=10Meg Vos=0 En=0 Enk=0 In=0 Ink=0 Rin=500Meg ;pnba In+)In-)V+)V-)OUT RDrive N003 N002 1000k C5 N001 N004 47n * Library below included based on ModelFile att...	Version 4 SHEET 1 3044 724 WIRE 528 -400 496 -400 WIRE 656 -400 608 -400 WIRE 768 -400 736 -400 WIRE 496 -208 496 -400 WIRE 416 -208 400 -208 WIRE 480 -208 464 -208 WIRE 496 -208 480 -208 WIRE 528 -208 496 -208 WIRE 768 -192 768 -400 WIRE 768 -192 592 -192 WIRE 528 -176 16 -176 WIRE 560 -144 560 -160 SYMBOL res 624 -41...
* Z:\home\khalils\Downloads\files\data\raw_asc\56f41dfd2274_Logic-gates-transistors-BJTs.asc * Generated by LTspice 26.0.1 for Windows. * NAND gate * AND gate * OR gate * Logic gates with NPN transistors * NOR gate R6 N004 Signal_2 10k R9 N009 Signal_2 10k V1 Vcc 0 12 Q4 Vcc N004 OR_out 0 2N3904 R5 N001 Signal_1 10k V3...	Version 4 SHEET 1 1140 1492 WIRE -208 -80 -208 -112 WIRE -64 -80 -64 -96 WIRE 272 -80 272 -96 WIRE -208 32 -208 0 WIRE -64 32 -64 0 WIRE 272 32 272 0 WIRE 800 224 800 192 WIRE 160 272 160 240 WIRE 608 272 496 272 WIRE 736 272 688 272 WIRE -32 320 -112 320 WIRE 96 320 48 320 WIRE 896 320 800 320 WIRE 800 416 800 400 WIR...
* Z:\tmp\asc_dec_bjh7r6w2\04b8296a625a_4046_dec2.asc * Generated by LTspice 26.0.1 for Windows. C2 7 6 2.2n V1 14 0 PULSE(0 5 0 10n 10n 5u 10u) B2 4 0 V=ddt(V(6,7))>0 ? 5 : 0 Tripdt=0.007u Tripdv=0.007m B3 0 N003 I=I(R2)*90 A3 N001 N002 0 0 0 15 0 0 SRFLOP Vhigh={Vhigh2} ref={ref2} S4 0 6 6 0 SW R3 4 0 1G C1 7 6 10p A2...	Version 4 SHEET 1 4564 1120 WIRE 144 -672 112 -672 WIRE 240 -672 224 -672 WIRE 496 -544 480 -544 WIRE 576 -528 560 -528 WIRE 576 -512 576 -528 WIRE 592 -512 576 -512 WIRE 496 -480 480 -480 WIRE 592 -464 560 -464 WIRE 768 -464 704 -464 WIRE 576 -352 560 -352 WIRE 768 -352 640 -352 WIRE 576 -320 544 -320 WIRE 912 -272 76...
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC1929-PG.asc * Generated by LTspice 26.0.1 for Windows. * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC1929-PG.asy) C7 N001 0 10 C4 N013 0 100p L2 N016 N017 1 D2 0 N006 1N5818 C5 N012...	Version 4 SHEET 1 2608 708 WIRE 816 -416 720 -416 WIRE 992 -416 816 -416 WIRE 1856 -416 992 -416 WIRE 1936 -416 1856 -416 WIRE 720 -400 720 -416 WIRE 1456 -400 1312 -400 WIRE 1552 -400 1456 -400 WIRE 1696 -400 1552 -400 WIRE 816 -384 816 -416 WIRE 1456 -384 1456 -400 WIRE 1552 -384 1552 -400 WIRE 1696 -384 1696 -400 WI...
* Z:\home\khalils\Downloads\files\data\raw_asc\2ndOrderHighpass.asc * Generated by LTspice 26.0.1 for Windows. * f0 and Q set by parameters * R1 is arbitary * This version puts 1/2 the R1 resistance in the capacitor * Vout * Vin * High frequency gain is set by the parameter "H" R1 N002 0 {R1/2} G2 0 2 N003 0 {10*H} G1 ...	Version 4 SHEET 1 1060 680 WIRE -560 -128 -624 -128 WIRE -464 -128 -496 -128 WIRE -288 -128 -416 -128 WIRE -208 -128 -288 -128 WIRE -32 -128 -144 -128 WIRE 96 -128 -32 -128 WIRE 256 -128 144 -128 WIRE 320 -128 256 -128 WIRE 352 -128 320 -128 WIRE 480 -128 416 -128 WIRE -624 -96 -624 -128 WIRE -416 -96 -416 -128 WIRE -3...
* Z:\tmp\asc_dec_bjh7r6w2\08708955e017_DCOffsetInputFilter_dec1.asc * Generated by LTspice 26.0.1 for Windows. R2 0 N001 470k R1 N001 Vcc 470k .backanno .end	Version 4 SHEET 1 880 1744 WIRE 32 1264 32 1232 WIRE 32 1488 32 1344 WIRE 32 1488 -112 1488 WIRE 32 1552 32 1488 WIRE 32 1712 32 1632 SYMBOL res 48 1648 R180 WINDOW 0 36 76 Left 2 WINDOW 3 36 40 Left 2 SYMATTR InstName R2 SYMATTR Value 470k SYMBOL res 48 1360 R180 WINDOW 0 36 76 Left 2 WINDOW 3 36 40 Left 2 SYMATTR Ins...
* Z:\home\khalils\Downloads\files\data\raw_asc\05f9024e1339_and.asc * Generated by LTspice 26.0.1 for Windows. A1 0 N001 0 N002 0 out2 out1 0 AND V2 N002 0 PULSE(0 5 0 0 0 4n 6n) V1 N001 0 PULSE(0 5 0 0 0 2n 6n) .tran 100n .backanno .end	Version 4.1 SHEET 1 880 680 WIRE -192 16 -352 16 WIRE 16 16 -112 16 WIRE 16 80 16 16 WIRE 128 80 16 80 WIRE 288 80 192 80 WIRE 128 112 16 112 WIRE 288 112 192 112 WIRE -352 160 -352 16 WIRE -192 160 -352 160 WIRE 16 160 16 112 WIRE 16 160 -112 160 WIRE -352 304 -352 160 IOPIN 288 80 Out IOPIN 288 112 Out SYMBOL voltage...
* Z:\home\khalils\Downloads\files\data\raw_asc\Vswitch.asc * Generated by LTspice 26.0.1 for Windows. * This example schematic is supplied for informational/educational purposes only. * This shows an example of suppling a .model statement as a SPICE\ndirective directly on the schematic to define a voltage controlled sw...	Version 4 SHEET 1 1276 680 WIRE 224 144 192 144 WIRE 336 144 304 144 WIRE 192 176 192 144 WIRE 144 192 -208 192 WIRE 336 192 336 144 WIRE -208 208 -208 192 WIRE 144 240 128 240 WIRE 192 272 192 256 WIRE 336 304 336 272 WIRE -208 320 -208 288 SYMBOL voltage -208 192 R0 WINDOW 3 13 107 Left 2 SYMATTR Value PULSE(0 1 0 .5...
* Z:\home\khalils\Downloads\files\data\raw_asc\LT9890.asc * Generated by LTspice 26.0.1 for Windows. * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\CurrentMonitors\LT9890.asy) R1 OUT 0 200 XU1 N001 0 MP_01 OUT IN LT9890 ;pnba IM)GND))IOUT)IP V1 IN 0...	Version 4 SHEET 1 880 680 WIRE 32 64 -96 64 WIRE 480 64 384 64 WIRE -96 112 -96 64 WIRE 480 112 480 64 WIRE -96 240 -96 192 WIRE 288 336 288 304 WIRE 480 336 480 192 WIRE 480 336 288 336 WIRE 128 352 128 304 WIRE 128 352 80 352 WIRE 288 368 288 336 WIRE 128 400 128 352 WIRE 128 560 128 480 SYMBOL res 112 384 R0 SYMATTR...
* Z:\tmp\asc_dec_bjh7r6w2\0ca241d51de6_TP1-Circ2_dec2.asc * Generated by LTspice 26.0.1 for Windows. V1 N002 0 10 V3 N003 0 2 RL N004 0 {RL} .backanno .end	Version 4 SHEET 1 880 680 WIRE 64 64 -144 64 WIRE 272 64 64 64 WIRE 64 112 64 64 WIRE 32 144 -32 144 WIRE 144 144 96 144 WIRE 272 160 272 64 WIRE -32 176 -32 144 WIRE 144 176 144 144 WIRE -32 272 -32 256 WIRE 144 272 144 256 WIRE -288 304 -336 304 WIRE -144 304 -144 192 WIRE -144 304 -208 304 WIRE 48 304 48 176 WIRE 48...
* Z:\home\khalils\Downloads\files\data\raw_asc\5f0c01582587_Fig9_31_PMOS.asc * Generated by LTspice 26.0.1 for Windows. * Plot Id(M1) M1 0 N001 N002 0 P_50n l=100n w=5u VSD 0 N002 0 VSG 0 N001 350m .model NMOS NMOS .model PMOS PMOS .lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos .dc VSD 0 1 1m .lib cmo...	Version 4 SHEET 1 1224 688 WIRE 320 96 320 80 WIRE 320 192 320 176 WIRE 400 192 320 192 WIRE 448 80 320 80 WIRE 448 112 448 80 WIRE 448 304 448 208 WIRE 672 80 448 80 WIRE 672 160 448 160 WIRE 672 160 672 80 WIRE 672 192 672 160 WIRE 672 304 448 304 WIRE 672 304 672 272 WIRE 848 80 672 80 WIRE 848 112 848 80 SYMBOL vol...
* Z:\home\khalils\Downloads\files\data\raw_asc\6f7538688507_npn_diode.asc * Generated by LTspice 26.0.1 for Windows. * NPN diode connection V1 +2 0 PULSE(-3 3 0 5m 5m 0 10m) Q1 +1 +1 0 0 2N3904 R1 +2 +1 1k .model NPN NPN .model PNP PNP .lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt .tran 100m .backann...	Version 4 SHEET 1 880 680 WIRE -224 -192 -272 -192 WIRE 144 -192 -224 -192 WIRE 224 -192 144 -192 WIRE 144 -144 144 -192 WIRE -224 -128 -224 -192 WIRE 144 -32 144 -64 WIRE 224 -32 144 -32 WIRE -224 -16 -224 -48 WIRE 144 16 144 -32 WIRE 224 16 144 16 WIRE 144 64 144 16 WIRE 144 64 16 64 WIRE 144 96 144 64 WIRE 16 144 16...
* Z:\home\khalils\Downloads\files\data\raw_asc\310affc9810e_7_diff_pair_cs-as-opamp-step.asc * Generated by LTspice 26.0.1 for Windows. ;.dc Vid1 -100m 100m 10u ;op ;.ac oct 100 10 1000MEG VSS 0 -VSS 1.5 R3 N001 vin 2.5Meg Mp1 vgatep vgatep VDD VDD PMOS-SH l=1u w=10u C3 vincs vout 2p C2 vout 0 0.5p Md1 vgatep N001 vs v...	Version 4 SHEET 1 1092 740 WIRE -976 -64 -1200 -64 WIRE -752 -64 -976 -64 WIRE -672 -64 -752 -64 WIRE -560 -64 -672 -64 WIRE -320 -64 -560 -64 WIRE -256 -64 -320 -64 WIRE -48 -64 -256 -64 WIRE 0 -64 -48 -64 WIRE -672 0 -672 -64 WIRE -320 0 -320 -64 WIRE -512 16 -624 16 WIRE -480 16 -512 16 WIRE -368 16 -480 16 WIRE -75...
* Z:\tmp\asc_dec_bjh7r6w2\0cd301d69156_Ampli_vertical_dec0.asc * Generated by LTspice 26.0.1 for Windows. R2 N001 Vs 20k Vao ao 0 PULSE(10 -10 0 4194304u 0 0 4194304u 1) AC 10 .backanno .end	Version 4 SHEET 1 880 680 WIRE 368 -48 64 -48 WIRE 368 -16 368 -48 WIRE 368 -16 320 -16 WIRE 416 -16 368 -16 WIRE 320 0 320 -16 WIRE 416 0 416 -16 WIRE -32 32 -48 32 WIRE 64 32 64 -48 WIRE 64 32 48 32 WIRE -48 80 -48 32 WIRE 320 96 320 64 WIRE 368 96 320 96 WIRE 416 96 416 80 WIRE 416 96 368 96 WIRE 64 128 64 32 WIRE 1...
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1366.asc * Generated by LTspice 26.0.1 for Windows. * Input Bias Current Cancellation * Library below included based on ModelFile attribute of instance XU1, XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1366.asy) V1 +V 0 5 XU1 IN N001 +V -V OUT LT1366 ;pnb...	Version 4 SHEET 1 896 720 WIRE 208 -32 192 -32 WIRE 320 -32 288 -32 WIRE 256 80 256 64 WIRE 192 96 192 -32 WIRE 224 96 192 96 WIRE 320 112 320 -32 WIRE 320 112 288 112 WIRE 368 112 320 112 WIRE 96 128 -128 128 WIRE 224 128 96 128 WIRE -128 144 -128 128 WIRE 256 160 256 144 WIRE 96 176 96 128 WIRE 192 208 192 96 WIRE 27...
* Z:\home\khalils\Downloads\files\data\raw_asc\ADM7171-5.0.asc * Generated by LTspice 26.0.1 for Windows. C2 N001 0 1n V1 IN 0 5.5 Rload OUT 0 8 C1 OUT 0 4.7 Rser=1.5m XU1 IN OUT IN N001 OUT 0 ADM7171-5.0 ;pnba Vin)Sense)EN)SS)Vout)GND .tran 5m startup * Library below included based on ModelFile attribute of instance X...	Version 4 SHEET 1 1048 680 WIRE 64 32 -32 32 WIRE 96 32 64 32 WIRE 384 32 352 32 WIRE 448 32 384 32 WIRE 544 32 448 32 WIRE -32 48 -32 32 WIRE 448 48 448 32 WIRE 544 48 544 32 WIRE 64 128 64 32 WIRE 96 128 64 128 WIRE -32 144 -32 128 WIRE 448 144 448 112 WIRE 544 144 544 128 WIRE 16 224 0 224 WIRE 96 224 80 224 WIRE 38...
* Z:\tmp\asc_dec_bjh7r6w2\09b13bdfce89_AD8604_dec2.asc * Generated by LTspice 26.0.1 for Windows. V2 -V 0 -2.5 XU1 IN N001 +V -V OUT AD8604 ;pnba In+)In-)V+)V-)OUT Rload OUT 0 10K * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8604.asy) .li...	Version 4 SHEET 1 1240 700 WIRE 480 -880 464 -880 WIRE 576 -880 560 -880 WIRE 592 -880 576 -880 WIRE 688 -880 672 -880 WIRE 240 -768 240 -784 WIRE 352 -768 352 -784 WIRE 576 -768 576 -880 WIRE 592 -768 576 -768 WIRE 688 -752 688 -880 WIRE 688 -752 656 -752 WIRE 816 -752 688 -752 WIRE 592 -736 480 -736 WIRE 816 -736 816...
* Z:\home\khalils\Downloads\files\data\raw_asc\LT8391.asc * Generated by LTspice 26.0.1 for Windows. C1 N021 0 10n C2 N022 0 10n Rser=2.21K V1 IN 0 12 R1 N001 N002 4m R2 IN N011 383K C3 N004 N001 .1 MQ1 IN N009 N001 N001 BSC067N06LS3 MQ2 N001 N007 0 0 BSC100N06LS3 L1 N002 N003 10 Rser=2m R3 N006 OUT 50m D1 N020 0 LXK2-...	Version 4 SHEET 1 2888 1300 WIRE -176 -512 -448 -512 WIRE -48 -512 -176 -512 WIRE -32 -512 -48 -512 WIRE 80 -512 48 -512 WIRE 96 -512 80 -512 WIRE 208 -512 176 -512 WIRE 432 -512 208 -512 WIRE -176 -448 -176 -512 WIRE -48 -448 -48 -512 WIRE 80 -448 80 -512 WIRE 208 -448 208 -512 WIRE -832 -384 -912 -384 WIRE -720 -384 ...
* Z:\home\khalils\Downloads\files\data\raw_asc\0a6a6ebd0ebd_Fig_4-21_Group-Delay_1001.asc * Generated by LTspice 26.0.1 for Windows. * Library below included based on ModelFile attribute of instance XU3 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1001.asy) R2 N001 0 10K R1 N001 OUT 10K XU3 N002 N001 +V -V ...	Version 4 SHEET 1 924 680 WIRE 48 80 16 80 WIRE 160 80 128 80 WIRE 208 80 160 80 WIRE 320 80 288 80 WIRE 256 176 256 160 WIRE 160 192 160 80 WIRE 224 192 160 192 WIRE 320 208 320 80 WIRE 320 208 288 208 WIRE 368 208 320 208 WIRE 64 224 32 224 WIRE 96 224 64 224 WIRE 224 224 176 224 WIRE 32 240 32 224 WIRE 256 256 256 2...
* Z:\home\khalils\Downloads\files\data\raw_asc\16f9d7365a77_antenna_input_coupling_resistive_2.asc * Generated by LTspice 26.0.1 for Windows. * LNA (50 Ohm output) * 64 - 108 MHz single-ended input * 162 - 240 MHz single-ended input * 470 - 970 MHz single-ended input * 1000 - 1800 MHz single-ended input * AM input 2\n0...	Version 4 SHEET 1 1332 1656 WIRE 464 -128 432 -128 WIRE 576 -128 544 -128 WIRE 576 -80 576 -128 WIRE 352 96 -80 96 WIRE 528 96 416 96 WIRE 528 112 528 96 WIRE 352 208 336 208 WIRE 528 208 528 192 WIRE 528 208 416 208 WIRE 336 272 336 208 WIRE -400 368 -448 368 WIRE -80 368 -80 96 WIRE -80 368 -320 368 WIRE 352 368 208 ...
* Z:\tmp\asc_dec_bjh7r6w2\092339d6a10f_three_coil_frequency_dec1.asc * Generated by LTspice 26.0.1 for Windows. R10 N012 N016 {RL} R7 N008 N018 10000 Lp2 N005 N010 {Lp} R15 N024 N023 0.1 C1 N001 N009 {Cr} Ls2 N011 N015 {Ls} Lp1 N014 N018 {Lp} R8 N006 N009 10000 R11 N015 N009 10000 C2 N014 N013 {Cp} Ls1 N002 N006 {Ls} ....	Version 4 SHEET 1 3864 3572 WIRE 1488 320 1376 320 WIRE 1696 320 1632 320 WIRE 1872 320 1760 320 WIRE 1376 368 1376 320 WIRE 1488 368 1488 320 WIRE 1632 368 1632 320 WIRE 1088 384 864 384 WIRE 1216 384 1152 384 WIRE 1632 480 1632 448 WIRE 1664 480 1632 480 WIRE 1872 480 1872 432 WIRE 1872 480 1744 480 WIRE 1376 496 137...
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4215-3.asc * Generated by LTspice 26.0.1 for Windows. * Simulate shorts * simulate board detection * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC4215-3.asy) R7 N003 N011 24K R1 N001...	Version 4 SHEET 1 1652 920 WIRE -384 -48 -800 -48 WIRE -96 -48 -384 -48 WIRE 16 -48 -96 -48 WIRE 32 -48 16 -48 WIRE 128 -48 112 -48 WIRE 160 -48 128 -48 WIRE 352 -48 256 -48 WIRE 592 -48 352 -48 WIRE 736 -48 592 -48 WIRE 832 -48 736 -48 WIRE 944 -48 832 -48 WIRE 1024 -48 944 -48 WIRE 1216 -48 1120 -48 WIRE -800 -32 -80...
* Z:\home\khalils\Downloads\files\data\raw_asc\1e8f086f832d_Fig13_23.asc * Generated by LTspice 26.0.1 for Windows. * Plot q+2.5 d+1.25 clock * Plot q+2.5 d+1.25 clock Vclock_b clock_b 0 PULSE 1 0 0 10p 10p 1.1n 2.2n M7 D clock_b N002 0 N_50n l=50n w=500n VDD VDD 0 1 M9 Q N001 0 0 N_50n l=50n w=500n M2 N004 N002 VDD VD...	Version 4 SHEET 1 1824 680 WIRE 1120 -688 1120 -720 WIRE 1120 -688 1088 -688 WIRE 1216 -688 1216 -720 WIRE 1632 -688 1216 -688 WIRE 1120 -656 1120 -688 WIRE 1216 -656 1216 -688 WIRE 272 -640 272 -672 WIRE 272 -640 240 -640 WIRE 368 -640 368 -672 WIRE 768 -640 368 -640 WIRE 272 -608 272 -640 WIRE 368 -608 368 -640 WIRE ...
* Z:\home\khalils\Downloads\files\data\raw_asc\02a32e4b5381_Auto_Voltage_Range.asc * Generated by LTspice 26.0.1 for Windows. V1 Input 0 SINE(0 12 0.5) V2 V+ 0 15 V3 V- 0 -15 R1 N003 Input 5K XU1 NC_01 N002 N003 V- 0 N001 V+ NC_02 LT1167 ;pnba Rg)In-)In+)V-)Ref)Out)V+)Rg V4 Vref 0 1.25 R2 N002 0 5K V5 Vdigital 0 5 R3 N...	Version 4 SHEET 1 1580 876 WIRE 816 -160 720 -160 WIRE 720 -144 720 -160 WIRE 592 -48 512 -48 WIRE 720 -32 720 -64 WIRE 720 -32 672 -32 WIRE 752 -32 720 -32 WIRE 32 80 -80 80 WIRE 144 80 112 80 WIRE 608 80 608 16 WIRE 32 144 0 144 WIRE 144 144 112 144 WIRE 512 144 512 -48 WIRE 512 144 400 144 WIRE 704 144 512 144 WIRE ...
* Z:\home\khalils\Downloads\files\data\raw_asc\283818e9778f_sim_MPPTX_Output-Voltage.asc * Generated by LTspice 26.0.1 for Windows. * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\LT1078.asy) XU1 N003 N001 N002 0 Vout LT1078 ;pnba In+)In-)V+)V...	Version 4 SHEET 1 880 680 WIRE 288 -224 -192 -224 WIRE 224 -32 224 -80 WIRE 288 -16 288 -224 WIRE 288 -16 256 -16 WIRE -80 0 -112 0 WIRE 16 0 -80 0 WIRE 192 0 16 0 WIRE -80 16 -80 0 WIRE 16 16 16 0 WIRE 304 16 256 16 WIRE -80 112 -80 96 WIRE -32 112 -80 112 WIRE 16 112 16 96 WIRE 16 112 -32 112 WIRE -32 128 -32 112 WIR...
* Z:\home\khalils\Downloads\files\data\raw_asc\a01c2859b4c3_ir2184.asc * Generated by LTspice 26.0.1 for Windows. * >> IR2184 Behavioral Model by analog@ieee.org 12/2005 Rev - << * Td=50ns\n(outputs) A1 In Com 0 0 0 2 1 0 SCHMITT Vt=1.75 Vh=0.95 Trise=430n Tfall=5n Td=220n Tripdt=50n A2 SD\ Com 0 0 0 0 3 0 SCHMITT Vt=1...	Version 4 SHEET 1 13828 1048 WIRE -496 -592 -496 -624 WIRE -496 672 -496 640 WIRE -464 -624 -496 -624 WIRE -464 672 -496 672 WIRE -320 -432 -352 -432 WIRE -320 -400 -320 -432 WIRE -320 -304 -320 -336 WIRE -320 -288 -368 -288 WIRE -320 -288 -320 -304 WIRE -320 -256 -320 -288 WIRE -320 -144 -352 -144 WIRE -320 -144 -320 ...
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2960-1.asc * Generated by LTspice 26.0.1 for Windows. * Configurable Regulator UVLO and Low Battery Indicator * 6V to 8.4V * Library below included based on ModelFile attribute of instance XU2 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3008-3.3.asy)...	Version 4 SHEET 1 3200 984 WIRE -2576 -4928 -2864 -4928 WIRE -2464 -4928 -2576 -4928 WIRE -2160 -4928 -2464 -4928 WIRE -2032 -4928 -2160 -4928 WIRE -1696 -4928 -1744 -4928 WIRE -1632 -4928 -1696 -4928 WIRE -1520 -4928 -1632 -4928 WIRE -1488 -4928 -1520 -4928 WIRE -2864 -4912 -2864 -4928 WIRE -2464 -4912 -2464 -4928 WIR...
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4085-1.asc * Generated by LTspice 26.0.1 for Windows. MQ1 N001 N002 OUT OUT FDS4685 C1 OUT 0 4.7 Rser=5m R1 OUT N006 1K D1 N006 N010 LXHL-BW02 R2 OUT N002 5.1K MQ2 N004 N005 OUT OUT FDS4685 C2 N004 0 2.5 ic=2.78 Rser=200m R3 N012 N013 10K V1 N001 0 PWL(0 0 7 0 +10u 5) V...	Version 4 SHEET 1 1124 696 WIRE 672 -464 -336 -464 WIRE 256 -416 -864 -416 WIRE 448 -416 352 -416 WIRE 592 -416 448 -416 WIRE 672 -416 672 -464 WIRE 672 -416 592 -416 WIRE 832 -416 672 -416 WIRE 672 -400 672 -416 WIRE 832 -400 832 -416 WIRE 336 -320 336 -368 WIRE 352 -320 336 -320 WIRE 448 -320 448 -416 WIRE 448 -320 4...
* Z:\home\khalils\Downloads\files\data\raw_asc\MAX5939A.asc * Generated by LTspice 26.0.1 for Windows. * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\MAX5939A.asy) XU1 N002 N003 N001 0 N004 N005 OUT- OUT+ MAX5939A ;pnba _PWRGD)OV)UV)VE...	Version 4 SHEET 1 4692 2996 WIRE 1312 1648 608 1648 WIRE 1680 1648 1312 1648 WIRE 2080 1648 1680 1648 WIRE 2496 1648 2080 1648 WIRE 1312 1680 1312 1648 WIRE 1680 1712 1680 1648 WIRE 2080 1728 2080 1648 WIRE 1312 1776 1312 1760 WIRE 1312 1776 1200 1776 WIRE 1424 1776 1312 1776 WIRE 1312 1808 1312 1776 WIRE 2080 1856 208...
* Z:\home\khalils\Downloads\files\data\raw_asc\30ac6d3870e8_ADA4523-1.asc * Generated by LTspice 26.0.1 for Windows. * V(OUT) = 101RsenseIsense * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\ADA4523-1.asy) D1 N002 OUT 1N4148 Isense 0 N003 0...	Version 4 SHEET 1 948 680 WIRE 112 -64 80 -64 WIRE 240 -64 192 -64 WIRE 448 -64 240 -64 WIRE 592 -64 528 -64 WIRE 16 0 16 -16 WIRE 336 32 336 0 WIRE 368 32 336 32 WIRE 336 64 336 32 WIRE 368 64 368 32 WIRE 240 80 240 -64 WIRE 320 80 240 80 WIRE 464 96 384 96 WIRE 592 96 592 -64 WIRE 592 96 528 96 WIRE 624 96 592 96 WIR...
* Z:\home\khalils\Downloads\files\data\raw_asc\42b23e6aeb64_v2.0.asc * Generated by LTspice 26.0.1 for Windows. * 3.3v * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\Optos\PC817B.asy) L1 VDD OUT 25m Rser=100 R3 N004 0 10k V1 IN 0 PULSE(0 3.3 2 1n 1n...	Version 4.1 SHEET 1 1332 680 WIRE 224 -160 224 -208 WIRE 560 -112 560 -160 WIRE 832 -112 832 -144 WIRE 832 -112 768 -112 WIRE 832 -80 832 -112 WIRE 768 -64 768 -112 WIRE 224 -32 224 -80 WIRE 368 -16 368 -64 WIRE 560 16 560 -32 WIRE 768 32 768 0 WIRE 832 32 832 0 WIRE 832 32 768 32 WIRE 560 112 560 80 WIRE 832 112 832 3...
* Z:\home\khalils\Downloads\files\data\raw_asc\LT4256-1.asc * Generated by LTspice 26.0.1 for Windows. * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT4256-1.asy) R1 N001 N005 64.9K R8 N003 N010 27K Rload N003 0 200G C1 N009 0 33n MQ1...	Version 4 SHEET 1 1412 680 WIRE 288 32 -96 32 WIRE 448 32 288 32 WIRE 480 32 448 32 WIRE 576 32 560 32 WIRE 592 32 576 32 WIRE 896 32 688 32 WIRE 992 32 896 32 WIRE 1088 32 992 32 WIRE 1184 32 1088 32 WIRE -96 48 -96 32 WIRE 1088 48 1088 32 WIRE 1184 48 1184 32 WIRE 288 64 288 32 WIRE 896 80 896 32 WIRE 672 96 672 80 W...
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3599.asc * Generated by LTspice 26.0.1 for Windows. * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3599.asy) C1 N016 0 .05 R2 N004 N005 1Meg V2 N006 0 PULSE(0 3.3 2m 10n 10n .5m 1m) R3...	Version 4 SHEET 1 1108 680 WIRE 32 -176 -96 -176 WIRE 96 -176 32 -176 WIRE 128 -176 96 -176 WIRE 240 -176 208 -176 WIRE 272 -176 240 -176 WIRE 384 -176 336 -176 WIRE 608 -176 384 -176 WIRE 720 -176 608 -176 WIRE -96 -160 -96 -176 WIRE 608 -160 608 -176 WIRE 96 -128 96 -176 WIRE 240 -128 240 -176 WIRE 384 -128 384 -176 ...
* Z:\home\khalils\Downloads\files\data\raw_asc\2a347c8b07d4_AD8236.asc * Generated by LTspice 26.0.1 for Windows. * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8236.asy) Rgain N002 N003 84.5K XU1 N004 N003 N002 N001 0 N005 OUT +V AD8236 ;p...	Version 4 SHEET 1 880 680 WIRE 128 80 -208 80 WIRE 208 80 208 64 WIRE 96 96 -16 96 WIRE 128 96 128 80 WIRE 144 96 128 96 WIRE -352 112 -352 96 WIRE -208 112 -208 80 WIRE -16 112 -16 96 WIRE 96 128 96 96 WIRE 144 128 96 128 WIRE 400 144 272 144 WIRE 144 160 96 160 WIRE 400 160 400 144 WIRE 144 192 128 192 WIRE -352 208 ...
* Z:\home\khalils\Downloads\files\data\raw_asc\1c7e1a267cbf_stepping_models_1.asc * Generated by LTspice 26.0.1 for Windows. * Example provided by Mike Engelhardt from Linear Technology. I1 0 B 0 V1 C 0 0 Q1 C B 0 0 {M} .model NPN NPN .model PNP PNP .lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.bjt .dc V...	Version 4 SHEET 1 896 680 WIRE 32 384 32 368 WIRE 32 288 32 272 WIRE 32 272 128 272 WIRE 192 384 192 320 WIRE 192 224 192 192 WIRE 192 192 336 192 WIRE 336 192 336 224 WIRE 336 304 336 384 SYMBOL voltage 336 208 R0 SYMATTR InstName V1 SYMATTR Value 0 SYMBOL current 32 368 M180 WINDOW 0 24 79 Left 0 WINDOW 3 24 0 Left 0...
* Z:\home\khalils\Downloads\files\data\raw_asc\LT1109-5.asc * Generated by LTspice 26.0.1 for Windows. * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT1109-5.asy) XU1 IN MP_01 N001 0 MP_02 MP_03 N002 OUT LT1109 top=250K bot=83K ;pnba ...	Version 4 SHEET 1 2376 1416 WIRE 1520 944 1296 944 WIRE 1584 944 1520 944 WIRE 1696 944 1664 944 WIRE 1760 944 1696 944 WIRE 1888 944 1824 944 WIRE 2000 944 1888 944 WIRE 1296 960 1296 944 WIRE 2000 960 2000 944 WIRE 1520 1008 1520 944 WIRE 1296 1056 1296 1040 WIRE 2000 1056 2000 1040 WIRE 1696 1072 1696 944 WIRE 1696 ...
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC4368-1.asc * Generated by LTspice 26.0.1 for Windows. * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\SpecialFunctions\LTC4368-1.asy) R7 N002 OUT 5m S1 OUT 0 N004 0 Sload R3 IN N007 464K XU1 IN N008 N...	Version 4 SHEET 1 2108 760 WIRE 288 -240 -400 -240 WIRE -400 -176 -400 -240 WIRE -400 -176 -816 -176 WIRE -288 -176 -400 -176 WIRE -144 -176 -192 -176 WIRE 32 -176 -48 -176 WIRE 48 -176 32 -176 WIRE 352 -176 128 -176 WIRE 544 -176 352 -176 WIRE -816 -160 -816 -176 WIRE 352 -160 352 -176 WIRE 544 -160 544 -176 WIRE 608 ...
* Z:\tmp\asc_dec_bjh7r6w2\0a1b45b0cdab_sim6_2nd_order_sinc_dec0.asc * Generated by LTspice 26.0.1 for Windows. Vclk clk 0 PULSE(0V 5V 10n 0.1n 0.1n 4n 10n) Vdd Vdd 0 5V Vrst rst 0 PULSE(5V 0V 25n 0.1n 0.1n 10m) .backanno .end	Version 4 SHEET 1 1064 680 SYMBOL voltage -208 -320 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 WINDOW 3 -42 138 Left 2 SYMATTR Value PULSE(0V 5V 10n 0.1n 0.1n 4n 10n) SYMATTR InstName Vclk SYMBOL voltage -48 -496 R0 SYMATTR InstName Vdd SYMATTR Value 5V SYMBOL voltage 224 -496 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 ...
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM8052A.asc * Generated by LTspice 26.0.1 for Windows. * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM8052A.asy) R2 N007 0 90.9K XU1 0 N001 N002 N002 OUT N002 MP_01 N006 MP_02 N004 MP_...	Version 4 SHEET 1 880 680 WIRE -32 -80 -144 -80 WIRE 208 -80 -32 -80 WIRE -144 -64 -144 -80 WIRE -32 -64 -32 -80 WIRE 208 -32 208 -80 WIRE -144 32 -144 16 WIRE -32 32 -32 16 WIRE 64 32 -32 32 WIRE 432 32 352 32 WIRE 528 32 432 32 WIRE 624 32 528 32 WIRE 432 48 432 32 WIRE 528 48 528 32 WIRE 624 48 624 32 WIRE 64 128 48...
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2913-1.asc * Generated by LTspice 26.0.1 for Windows. * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC2913-1.asy) R8 N003 N007 10K C1 N011 0 10n R6 N001 N008 27.4K V3 N003 0 PWL(0 0 3...	Version 4 SHEET 1 1388 680 WIRE -16 -128 -1104 -128 WIRE -176 -96 -928 -96 WIRE -176 -80 -176 -96 WIRE -16 -80 -16 -128 WIRE 400 -16 192 -16 WIRE 496 -16 400 -16 WIRE 608 -16 496 -16 WIRE 192 0 192 -16 WIRE 400 0 400 -16 WIRE 608 0 608 -16 WIRE -176 32 -176 0 WIRE 80 32 -176 32 WIRE -176 48 -176 32 WIRE 496 80 496 -16 ...
* Z:\home\khalils\Downloads\files\data\raw_asc\85c928810a0c_Circuito6.asc * Generated by LTspice 26.0.1 for Windows. V1 N001 0 AC 1 L1 N001 N002 1m C1 N002 N003 10n R1 N003 0 50 .ac dec 10000 1 10Meg .backanno .end	Version 4 SHEET 1 880 680 WIRE 48 112 0 112 WIRE 160 112 128 112 WIRE 288 112 224 112 WIRE 0 144 0 112 WIRE 288 144 288 112 WIRE 0 256 0 224 WIRE 288 256 288 224 WIRE 288 256 0 256 WIRE 0 288 0 256 SYMBOL cap 160 128 R270 WINDOW 0 32 32 VTop 2 WINDOW 3 0 32 VBottom 2 SYMATTR InstName C1 SYMATTR Value 10n SYMBOL voltage...
* Z:\home\khalils\Downloads\files\data\raw_asc\b01b1d5aa9ae_1078A.asc * Generated by LTspice 26.0.1 for Windows. V1 +V 0 5 R1 N002 N001 200K R2 N001 IN 200K V3 IN 0 SINE(0 1 100) D1 N003 N002 1N4148 XU1 0 N001 +V 0 N003 LT1078 ;pnba In+)In-)V+)V-)OUT XU2 N002 OUT +V 0 OUT LT1078 ;pnba In+)In-)V+)V-)OUT .model D D .lib ...	Version 4 SHEET 1 896 680 WIRE 32 96 -80 96 WIRE 128 96 112 96 WIRE 224 96 128 96 WIRE 416 96 304 96 WIRE -80 112 -80 96 WIRE 544 128 432 128 WIRE -192 160 -192 144 WIRE 480 192 480 176 WIRE -80 208 -80 192 WIRE 192 208 192 192 WIRE 432 208 432 128 WIRE 448 208 432 208 WIRE 128 224 128 96 WIRE 160 224 128 224 WIRE 544 ...
* Z:\home\khalils\Downloads\files\data\raw_asc\LTM4702.asc * Generated by LTspice 26.0.1 for Windows. * Vin=12V, Vout=1V/8A * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTM4702.asy) C3 OUT 0 100 Rser = 5m Rload OUT 0 0.124 R3 OUT N00...	Version 4 SHEET 1 2216 900 WIRE -368 -896 -752 -896 WIRE -176 -896 -368 -896 WIRE -752 -848 -752 -896 WIRE -176 -816 -176 -896 WIRE -368 -768 -368 -896 WIRE -320 -768 -368 -768 WIRE 96 -768 -32 -768 WIRE 224 -768 96 -768 WIRE 384 -768 224 -768 WIRE 544 -768 384 -768 WIRE 704 -768 544 -768 WIRE 880 -768 704 -768 WIRE -7...
* Z:\home\khalils\Downloads\files\data\raw_asc\2457b9765153_1.asc * Generated by LTspice 26.0.1 for Windows. V2 N001 0 0.9 M1 N001 N002 0 0 efremov V1 N002 0 V .model NMOS NMOS .model PMOS PMOS .lib C:\users\khalils\AppData\Local\LTspice\lib\cmp\standard.mos .model efremov nmos VTO=0.34 LAMBDA=0.05 TOX=3.6n UO=353 l=0....	Version 4 SHEET 1 880 680 WIRE 384 96 144 96 WIRE 384 144 384 96 WIRE 96 176 -48 176 WIRE -48 208 -48 176 WIRE -48 320 -48 288 WIRE -16 320 -48 320 WIRE 144 320 144 192 WIRE 144 320 -16 320 WIRE 384 320 384 224 WIRE 384 320 144 320 SYMBOL voltage 384 128 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2...
* Z:\home\khalils\Downloads\files\data\raw_asc\LT3420-1.asc * Generated by LTspice 26.0.1 for Windows. * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LT3420-1.asy) R1 N003 N002 51.1K K1 L1 L2 1 L1 IN N003 20 Rpar=2K Rser=.1 R2 N006 0 2...	Version 4 SHEET 1 2740 1752 WIRE 1616 1040 1536 1040 WIRE 1808 1040 1616 1040 WIRE 2064 1040 1808 1040 WIRE 2192 1040 2112 1040 WIRE 2304 1040 2256 1040 WIRE 1536 1056 1536 1040 WIRE 2064 1056 2064 1040 WIRE 2112 1056 2112 1040 WIRE 2304 1056 2304 1040 WIRE 1536 1152 1536 1136 WIRE 2304 1152 2304 1120 WIRE 1968 1184 19...
* Z:\home\khalils\Downloads\files\data\raw_asc\AD8628.asc * Generated by LTspice 26.0.1 for Windows. * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\OpAmps\AD8628.asy) V1 +V 0 2.5 Rload OUT 0 10K R1 N001 0 10K XU1 IN N001 +V -V OUT AD8628 ;pnba In+)I...	Version 4 SHEET 1 1240 700 WIRE -16 -1056 -32 -1056 WIRE 80 -1056 64 -1056 WIRE 96 -1056 80 -1056 WIRE 192 -1056 176 -1056 WIRE -256 -944 -256 -960 WIRE -144 -944 -144 -960 WIRE 80 -944 80 -1056 WIRE 96 -944 80 -944 WIRE 192 -928 192 -1056 WIRE 192 -928 160 -928 WIRE 320 -928 192 -928 WIRE 96 -912 -16 -912 WIRE 320 -91...
* Z:\home\khalils\Downloads\files\data\raw_asc\5c6e9c62f096_pull_out_stage.asc * Generated by LTspice 26.0.1 for Windows. * Amplifier output Stages Q2 N001 N002 2+ 0 NPN R3 V+ N001 100 Q1 N003 N002 2+ 0 PNP V1 V+ 0 5 R1 2+ 0 2.2k R2 N003 V- 100 V2 N002 0 SINE(0 6 1k) V3 V- 0 -5 .model NPN NPN .model PNP PNP .lib C:\use...	Version 4 SHEET 1 880 680 WIRE 192 -384 192 -416 WIRE -352 -288 -352 -304 WIRE -352 -288 -384 -288 WIRE -208 -288 -208 -304 WIRE -208 -288 -240 -288 WIRE 192 -272 192 -304 WIRE -352 -256 -352 -288 WIRE -208 -256 -208 -288 WIRE 128 -224 96 -224 WIRE -352 -160 -352 -176 WIRE -208 -160 -208 -176 WIRE 96 -144 96 -224 WIRE ...
* Z:\home\khalils\Downloads\files\data\raw_asc\ADP172-1.65.asc * Generated by LTspice 26.0.1 for Windows. * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\ADP172-1.65.asy) RLOAD OUT 0 5.56 V1 IN 0 3.6 XU1 OUT IN IN 0 ADP172-1.65 ;pnba Vo...	Version 4 SHEET 1 880 680 WIRE -32 80 -48 80 WIRE 48 80 -32 80 WIRE 64 80 48 80 WIRE 304 80 256 80 WIRE 336 80 304 80 WIRE 384 80 336 80 WIRE -48 96 -48 80 WIRE 304 96 304 80 WIRE 304 176 304 160 WIRE 384 176 384 160 WIRE -48 192 -48 176 WIRE 48 192 48 80 WIRE 64 192 48 192 WIRE 272 192 256 192 SYMBOL voltage -48 80 R0...
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC2932.asc * Generated by LTspice 26.0.1 for Windows. * Transient Duration vs Comparator Overdrive (V1, V2) Test Jig\nThis circuit is for injecting variable lenght and duration pulses that are\nbelow the typical 5V comparator threshold on V1. The actual threshold here\nha...	Version 4 SHEET 1 920 748 WIRE 448 -96 48 -96 WIRE 544 -96 448 -96 WIRE 640 -96 544 -96 WIRE 448 -80 448 -96 WIRE 544 -80 544 -96 WIRE 640 -80 640 -96 WIRE -480 16 -528 16 WIRE 64 16 -400 16 WIRE 448 16 448 0 WIRE 448 16 400 16 WIRE 48 64 48 -96 WIRE 48 64 -64 64 WIRE 64 64 48 64 WIRE 544 64 544 0 WIRE 544 64 400 64 WI...
* Z:\home\khalils\Downloads\files\data\raw_asc\LTC7825.asc * Generated by LTspice 26.0.1 for Windows. * Library below included based on ModelFile attribute of instance XU1 (C:\users\khalils\AppData\Local\LTspice\lib\sym\PowerProducts\LTC7825.asy) R4 0 N005 102k C7 N009 0 10 m=2 R6 vOUT N012 20k R3 N009 N014 4.99 C5 INT...	Version 4 SHEET 1 1724 728 WIRE 272 -272 -368 -272 WIRE 320 -272 272 -272 WIRE 432 -272 384 -272 WIRE 160 -224 -128 -224 WIRE 160 -192 160 -224 WIRE 272 -192 272 -272 WIRE -128 -160 -128 -224 WIRE 560 -128 512 -128 WIRE 672 -128 560 -128 WIRE 768 -128 672 -128 WIRE 912 -128 768 -128 WIRE 1104 -128 1008 -128 WIRE -432 -...
* Z:\home\khalils\Downloads\files\data\raw_asc\a4a5bec0c4ea_6.asc * Generated by LTspice 26.0.1 for Windows. M2 N011 0 N015 N015 NMOS R1 N009 N011 1k C1 N007 0 820p M1 N010 N012 N013 N013 NMOS Q1 N005 N004 N002 0 PNP R11 0 N017 1k R3 N001 N002 200 Q4 N009 N006 N007 0 PNP M4 N016 N016 N017 N017 NMOS R16 N012 0 1Meg R5 N...	Version 4 SHEET 1 912 1696 WIRE 384 -144 384 -192 WIRE 240 -32 112 -32 WIRE 384 -32 384 -64 WIRE 384 -32 240 -32 WIRE 512 -32 384 -32 WIRE 112 16 112 -32 WIRE 240 32 240 -32 WIRE 512 48 512 -32 WIRE 240 192 240 112 WIRE 512 192 512 128 WIRE 384 240 304 240 WIRE 448 240 384 240 WIRE 384 320 384 240 WIRE 512 320 512 288 ...

End of preview. Expand in Data Studio

LTspice Netlist ↔ ASC Schematic Dataset

SPICE netlists paired with their corresponding LTspice .asc schematic files, scraped from public GitHub repositories.

Columns

netlist (string): SPICE netlist content
asc (string): Corresponding LTspice .asc schematic file content

Splits

train: 53000 samples
test: 2790 samples

Usage

from datasets import load_dataset
ds = load_dataset("Si7li/ltspice-spice-circuits")
sample = ds['train'][0]
print("Netlist:", sample['netlist'][:200])
print("ASC:", sample['asc'][:200])

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