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#***********************************************************************
# Copyright 2022 Massachusets Institute of Technology
# SPDX short identifier: BSD-2-Clause
#
# File Name: CMakeLists.txt
# Program: Common Evaluation Platform (CEP)
# Description: CMake file
# Notes:
#********************... |
/*
* Copyright 2012, Homer Hsing <homer.hsing@gmail.com>
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applica... |
/*
* Copyright 2012, Homer Hsing <homer.hsing@gmail.com>
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applica... |
//
// Copyright (C) 2018 Massachusetts Institute of Technology
//
// File : aes_top.v
// Project : Common Evaluation Platform (CEP)
// Description : This file provides a wishbone based-AES core
//
module aes_top_192(
wb_adr_i, wb_cyc_i, wb_dat_i, wb_sel_i,
wb_stb_i, wb_we_i,
... |
//
// Copyright (C) 2018 Massachusetts Institute of Technology
//
// File : aes_top.v
// Project : Common Evaluation Platform (CEP)
// Description : This file provides a wishbone based-AES core
//
module aes_top_128(
wb_adr_i, wb_cyc_i, wb_dat_i, wb_sel_i,
wb_stb_i, wb_we_i,
... |
//
// Copyright (C) 2018 Massachusetts Institute of Technology
//
// File : aes_top.v
// Project : Common Evaluation Platform (CEP)
// Description : This file provides a wishbone based-AES core
//
module aes_top_192(
wb_adr_i, wb_cyc_i, wb_dat_i, wb_sel_i,
wb_stb_i, wb_we_i,
... |
/*
* Copyright 2012, Homer Hsing <homer.hsing@gmail.com>
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applica... |
/*
* Copyright 2012, Homer Hsing <homer.hsing@gmail.com>
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applica... |
/////////////////////////////////////////////////////////////////////
//// ////
//// CRP ////
//// DES Crypt Module ////
//// ... |
/////////////////////////////////////////////////////////////////////
//// ////
//// DES ////
//// DES Top Level module ////
//// ... |
//
// Copyright (C) 2018 Massachusetts Institute of Technology
//
// File : des3_top.v
// Project : Common Evaluation Platform (CEP)
// Description : This file provides a wishbone based-DES3 core
//
module des3_top #(
parameter remove_parity_bits=0)
(
wb_adr_i, wb_cyc_i, wb_dat_i, wb_sel_i,
w... |
/////////////////////////////////////////////////////////////////////
//// ////
//// KEY_SEL ////
//// Select one of 16 sub-keys for round ////
//// ... |
/////////////////////////////////////////////////////////////////////
//// ////
//// SBOX ////
//// The SBOX is essentially a 64x4 ROM ////
//// ... |
/////////////////////////////////////////////////////////////////////
//// ////
//// SBOX ////
//// The SBOX is essentially a 64x4 ROM ////
//// ... |
/////////////////////////////////////////////////////////////////////
//// ////
//// SBOX ////
//// The SBOX is essentially a 64x4 ROM ////
//// ... |
/////////////////////////////////////////////////////////////////////
//// ////
//// SBOX ////
//// The SBOX is essentially a 64x4 ROM ////
//// ... |
/////////////////////////////////////////////////////////////////////
//// ////
//// SBOX ////
//// The SBOX is essentially a 64x4 ROM ////
//// ... |
/////////////////////////////////////////////////////////////////////
//// ////
//// SBOX ////
//// The SBOX is essentially a 64x4 ROM ////
//// ... |
/////////////////////////////////////////////////////////////////////
//// ////
//// SBOX ////
//// The SBOX is essentially a 64x4 ROM ////
//// ... |
/////////////////////////////////////////////////////////////////////
//// ////
//// SBOX ////
//// The SBOX is essentially a 64x4 ROM ////
//// ... |
//
// Copyright (C) 2018 Massachusetts Institute of Technology
//
// File : md5_top.v
// Project : Common Evaluation Platform (CEP)
// Description : This file provides a wishbone based-MD5 core
//
module md5_top(
wb_adr_i, wb_cyc_i, wb_dat_i, wb_sel_i,
wb_stb_i, wb_we_i,
... |
/*****************************************************************
Pancham is an MD5 compliant IP core for cryptographic
applications.
Copyright (C) 2003 Swapnajit Mittra, Project VeriPage
(Contact email: verilog_tutorial at hotmail.com
Website : http://www.angelfire.com/ca/verilog)
This library is fre... |
/*****************************************************************
Pancham is an MD5 compliant IP core for cryptographic applicati
-ons.
Copyright (C) 2003 Swapnajit Mittra, Project VeriPage
(Contact email: verilog_tutorial at hotmail.com
Website : http://www.angelfire.com/ca/verilog)
This library is fr... |
--------------------
Exponent
--------------------
000000ff
255
--------------------
Modulus
--------------------
000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000... |
//------------------------------------------------------------------
// Simulator directives.
//------------------------------------------------------------------
`timescale 1ns/100ps
//------------------------------------------------------------------
// Test module.
//------------------------------------------------... |
//======================================================================
//
// tb_modexp.v
// -----------
// Testbench modular exponentiation core.
//
//
// Author: Joachim Strombergson, Peter Magnusson
// Copyright (c) 2015, NORDUnet A/S All rights reserved.
//
// Redistribution and use in source and binary forms, wit... |
//------------------------------------------------------------------
// Simulator directives.
//------------------------------------------------------------------
`timescale 1ns/100ps
//------------------------------------------------------------------
// Test module.
//------------------------------------------------... |
//////////////////////////////////////////////////////////////////////
//// ////
//// timescale.v ////
//// ////
//// ... |
//======================================================================
//
// adder.v
// -------
// Adder with separate carry in and carry out. Used in the montprod
// amd residue modules of the modexp core.
//
//
// Author: Peter Magnusson, Joachim Strömbergson
// Copyright (c) 2015, NORDUnet A/S All rights reserved.... |
//======================================================================
//
// blockmem1rw1.v
// --------------
// Synchronous block memory with one read and one write port.
// The data size is the same for both read and write operations.
//
// The memory is used in the modexp core.
//
// paremeter OPW is operand word ... |
//======================================================================
//
// blockmem2r1w.v
// --------------
// Synchronous block memory with two read ports and one write port.
// The data size is the same for both read and write operations.
//
// The memory is used in the modexp core.
//
//
// Author: Joachim Strom... |
//======================================================================
//
// blockmem2r1wptr.v
// -----------------
// Synchronous block memory with two read ports and one write port.
// For port 1 the address is implicit and instead given by the
// internal pointer. The pointer is automatically increased
// when the... |
//======================================================================
//
// blockmem2r1wptr.v
// -----------------
// Synchronous block memory with two read ports and one write port.
// For port 1 the address is implicit and instead given by the
// internal pointer. But write address is explicitly given.
//
// The m... |
//======================================================================
//
// modexp.v
// --------
// Top level wrapper for the modula exponentiation core. The core
// is used to implement public key algorithms such as RSA,
// DH, ElGamal etc.
//
// The core calculates the following function:
//
// C = M ** e mod N
... |
//======================================================================
//
// modexp_core.v
// -------------
// Modular exponentiation core for implementing public key algorithms
// such as RSA, DH, ElGamal etc.
//
// The core calculates the following function:
//
// C = M ** e mod N
//
// M is a message with a le... |
module rsa_top(
wb_adr_i, wb_cyc_i, wb_dat_i, wb_sel_i,
wb_stb_i, wb_we_i,
wb_ack_o, wb_err_o, wb_dat_o,
wb_clk_i, wb_rst_i, int_o
);
parameter dw = 32;
parameter aw = 32;
input [aw-1:0] wb_adr_i; //Address
input wb_cyc_i; //bus cycle
input [dw-1:0] wb_dat_i; //Data IN
... |
//======================================================================
//
// montprod.v
// ---------
// Montgomery product calculator for the modular exponentiantion core.
//
// parameter OPW is operand word width in bits.
// parameter ADW is address width in bits.
//
//
// Author: Peter Magnusson, Joachim Strombergs... |
//======================================================================
//
// residue.v
// ---------
// Modulus 2**2N residue calculator for montgomery calculations.
//
// m_residue_2_2N_array( N, M, Nr)
// Nr = 00...01 ; Nr = 1 == 2**(2N-2N)
// for (int i = 0; i < 2 * N; i++)
// Nr = Nr shift left 1
// if... |
module rsa_top(
wb_adr_i, wb_cyc_i, wb_dat_i, wb_sel_i,
wb_stb_i, wb_we_i,
wb_ack_o, wb_err_o, wb_dat_o,
wb_clk_i, wb_rst_i, int_o
);
parameter dw = 32;
parameter aw = 32;
input [aw-1:0] wb_adr_i; //Address
input wb_cyc_i; //bus cycle
input [dw-1:0] wb_dat_i; //Data IN
... |
//======================================================================
//
// shl.v
// -----
// One bit left shift of words with carry in and carry out. Used in
// the residue module of the modexp core.
//
//
// Author: Peter Magnusson, Joachim Strömbergson
// Copyright (c) 2015, NORDUnet A/S All rights reserved.
//
/... |
//======================================================================
//
// shr32.v
// -------
// One bit right shift with carry in and carry out.
// Used in the montprod module of the modexp core.
//
//
// Author: Peter Magnusson, Joachim Strömbergson
// Copyright (c) 2015, NORDUnet A/S All rights reserved.
//
// R... |
//======================================================================
//
// sha256_core.v
// -------------
// Verilog 2001 implementation of the SHA-256 hash function.
// This is the internal core with wide interfaces.
//
//
// Author: Joachim Strombergson
// Copyright (c) 2013, Secworks Sweden AB
// All rights rese... |
//======================================================================
//
// sha256_k_constants.v
// --------------------
// The table K with constants in the SHA-256 hash function.
//
//
// Author: Joachim Strombergson
// Copyright (c) 2013, Secworks Sweden AB
// All rights reserved.
//
// Redistribution and use in ... |
//
// Copyright (C) 2018 Massachusetts Institute of Technology
//
// File : sha256_top.v
// Project : Common Evaluation Platform (CEP)
// Description : This file provides a wishbone based-SHA256 core
//
module sha256_top(
wb_adr_i, wb_cyc_i, wb_dat_i, wb_sel_i,
wb_stb_i, wb_we_i,
... |
//======================================================================
//
// sha256_w_mem_regs.v
// -------------------
// The W memory. This version uses 16 32-bit registers as a sliding
// window to generate the 64 words.
//
//
// Author: Joachim Strombergson
// Copyright (c) 2013, Secworks Sweden AB
// All rights ... |
/* Copyright (c) 2012-2013 by the author(s)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, ... |
// Copyright 2016 by the authors
//
// Copyright and related rights are licensed under the Solderpad
// Hardware License, Version 0.51 (the "License"); you may not use
// this file except in compliance with the License. You may obtain a
// copy of the License at http://solderpad.org/licenses/SHL-0.51.
// Unless require... |
// Copyright 2016 by the authors
//
// Copyright and related rights are licensed under the Solderpad
// Hardware License, Version 0.51 (the "License"); you may not use
// this file except in compliance with the License. You may obtain a
// copy of the License at http://solderpad.org/licenses/SHL-0.51.
// Unless require... |
// Copyright 2016 by the authors
//
// Copyright and related rights are licensed under the Solderpad
// Hardware License, Version 0.51 (the "License"); you may not use
// this file except in compliance with the License. You may obtain a
// copy of the License at http://solderpad.org/licenses/SHL-0.51.
// Unless require... |
// Copyright 2016 by the authors
//
// Copyright and related rights are licensed under the Solderpad
// Hardware License, Version 0.51 (the "License"); you may not use
// this file except in compliance with the License. You may obtain a
// copy of the License at http://solderpad.org/licenses/SHL-0.51.
// Unless require... |
// Copyright 2016 by the authors
//
// Copyright and related rights are licensed under the Solderpad
// Hardware License, Version 0.51 (the "License"); you may not use
// this file except in compliance with the License. You may obtain a
// copy of the License at http://solderpad.org/licenses/SHL-0.51.
// Unless require... |
// Copyright 2016 by the authors
//
// Copyright and related rights are licensed under the Solderpad
// Hardware License, Version 0.51 (the "License"); you may not use
// this file except in compliance with the License. You may obtain a
// copy of the License at http://solderpad.org/licenses/SHL-0.51.
// Unless require... |
// Copyright 2016 by the authors
//
// Copyright and related rights are licensed under the Solderpad
// Hardware License, Version 0.51 (the "License"); you may not use
// this file except in compliance with the License. You may obtain a
// copy of the License at http://solderpad.org/licenses/SHL-0.51.
// Unless require... |
// Copyright 2016 by the authors
//
// Copyright and related rights are licensed under the Solderpad
// Hardware License, Version 0.51 (the "License"); you may not use
// this file except in compliance with the License. You may obtain a
// copy of the License at http://solderpad.org/licenses/SHL-0.51.
// Unless require... |
// Copyright 2016 by the authors
//
// Copyright and related rights are licensed under the Solderpad
// Hardware License, Version 0.51 (the "License"); you may not use
// this file except in compliance with the License. You may obtain a
// copy of the License at http://solderpad.org/licenses/SHL-0.51.
// Unless require... |
// Copyright 2016 by the authors
//
// Copyright and related rights are licensed under the Solderpad
// Hardware License, Version 0.51 (the "License"); you may not use
// this file except in compliance with the License. You may obtain a
// copy of the License at http://solderpad.org/licenses/SHL-0.51.
// Unless require... |
// Copyright 2016-2017 by the authors
//
// Copyright and related rights are licensed under the Solderpad
// Hardware License, Version 0.51 (the "License"); you may not use
// this file except in compliance with the License. You may obtain a
// copy of the License at http://solderpad.org/licenses/SHL-0.51.
// Unless re... |
// Copyright 2016-2017 by the authors
//
// Copyright and related rights are licensed under the Solderpad
// Hardware License, Version 0.51 (the "License"); you may not use
// this file except in compliance with the License. You may obtain a
// copy of the License at http://solderpad.org/licenses/SHL-0.51.
// Unless re... |
// Copyright 2016 by the authors
//
// Copyright and related rights are licensed under the Solderpad
// Hardware License, Version 0.51 (the "License"); you may not use
// this file except in compliance with the License. You may obtain a
// copy of the License at http://solderpad.org/licenses/SHL-0.51.
// Unless require... |
// Copyright 2016 by the authors
//
// Copyright and related rights are licensed under the Solderpad
// Hardware License, Version 0.51 (the "License"); you may not use
// this file except in compliance with the License. You may obtain a
// copy of the License at http://solderpad.org/licenses/SHL-0.51.
// Unless require... |
// Copyright 2016 by the authors
//
// Copyright and related rights are licensed under the Solderpad
// Hardware License, Version 0.51 (the "License"); you may not use
// this file except in compliance with the License. You may obtain a
// copy of the License at http://solderpad.org/licenses/SHL-0.51.
// Unless require... |
// Copyright 2016 by the authors
//
// Copyright and related rights are licensed under the Solderpad
// Hardware License, Version 0.51 (the "License"); you may not use
// this file except in compliance with the License. You may obtain a
// copy of the License at http://solderpad.org/licenses/SHL-0.51.
// Unless require... |
// Copyright 2016 by the authors
//
// Copyright and related rights are licensed under the Solderpad
// Hardware License, Version 0.51 (the "License"); you may not use
// this file except in compliance with the License. You may obtain a
// copy of the License at http://solderpad.org/licenses/SHL-0.51.
// Unless require... |
// Copyright 2016 by the authors
//
// Copyright and related rights are licensed under the Solderpad
// Hardware License, Version 0.51 (the "License"); you may not use
// this file except in compliance with the License. You may obtain a
// copy of the License at http://solderpad.org/licenses/SHL-0.51.
// Unless require... |
// Copyright 2016 by the authors
//
// Copyright and related rights are licensed under the Solderpad
// Hardware License, Version 0.51 (the "License"); you may not use
// this file except in compliance with the License. You may obtain a
// copy of the License at http://solderpad.org/licenses/SHL-0.51.
// Unless require... |
// Copyright 2016 by the authors
//
// Copyright and related rights are licensed under the Solderpad
// Hardware License, Version 0.51 (the "License"); you may not use
// this file except in compliance with the License. You may obtain a
// copy of the License at http://solderpad.org/licenses/SHL-0.51.
// Unless require... |
/*
* This source file contains a Verilog description of an IP core
* automatically generated by the SPIRAL HDL Generator.
*
* This product includes a hardware design developed by Carnegie Mellon University.
*
* Copyright (c) 2005-2011 by Peter A. Milder for the SPIRAL Project,
* Carnegie Mellon University
*
* ... |
//
// Copyright (C) 2018 Massachusetts Institute of Technology
//
// File : dft_top_top.v
// Project : Common Evaluation Platform (CEP)
// Description : This file provides a wishbone based-DFT core
//
module dft_top_top(
wb_adr_i, wb_cyc_i, wb_dat_i, wb_sel_i,
wb_stb_i, wb_we_i,
... |
/*------------------------------------------------------------------------------
* This code was generated by Spiral IIR Filter Generator, www.spiral.net
* Copyright (c) 2006, Carnegie Mellon University
* All rights reserved.
* The code is distributed under a BSD style license
* (see http://www.opensource.org/lice... |
//
// Copyright (C) 2018 Massachusetts Institute of Technology
//
// File : fir_top.v
// Project : Common Evaluation Platform (CEP)
// Description : This file provides a wishbone based-FIR core
//
module fir_top(
wb_adr_i, wb_cyc_i, wb_dat_i, wb_sel_i,
wb_stb_i, wb_we_i,
... |
/*
* This source file contains a Verilog description of an IP core
* automatically generated by the SPIRAL HDL Generator.
*
* This product includes a hardware design developed by Carnegie Mellon University.
*
* Copyright (c) 2005-2011 by Peter A. Milder for the SPIRAL Project,
* Carnegie Mellon University
*
* ... |
//
// Copyright (C) 2018 Massachusetts Institute of Technology
//
// File : idft_top_top.v
// Project : Common Evaluation Platform (CEP)
// Description : This file provides a wishbone based-IDFT core
//
module idft_top_top(
wb_adr_i, wb_cyc_i, wb_dat_i, wb_sel_i,
wb_stb_i, wb_we_i,
... |
/*------------------------------------------------------------------------------
* This code was generated by Spiral IIR Filter Generator, www.spiral.net
* Copyright (c) 2006, Carnegie Mellon University
* All rights reserved.
* The code is distributed under a BSD style license
* (see http://www.opensource.org/lice... |
//
// Copyright (C) 2018 Massachusetts Institute of Technology
//
// File : iir_top.v
// Project : Common Evaluation Platform (CEP)
// Description : This file provides a wishbone based-IIR core
//
module iir_top(
wb_adr_i, wb_cyc_i, wb_dat_i, wb_sel_i,
wb_stb_i, wb_we_i,
... |
//
// Copyright (C) 2018 Massachusetts Institute of Technology
//
// File : iir_top_axi4lite.v
// Project : Common Evaluation Platform (CEP)
// Description : This file provides an axi4-lite wrapper for the wishbone based-IIR core
//
module iir_top_axi4lite (
// Clock & Reset
input logic clk_... |
//////////////////////////////////////////////////////////////////////////////////
// Description: Generate 1023 chip sequence for SV PRN number prn_num.
// First chip on chip_out after reset.
// Asserting enb will advance to next chip.
//
////////////////////////////////////////////... |
module cacode_test (chip);
output chip;
reg clk = 0;
reg rst = 0;
reg [5:0] prn_num = 1;
reg enb = 0;
always
#10 clk <= ~clk;
initial begin
#1;
repeat (32) @(negedge clk)
rst <= 0;
repeat (32) @(negedge clk)
rst <= 1;
repeat (32) @(negedge clk)
rst <= 0;
end
initial begin
... |
// From the GPS transmitter's perspective
module gps(
sys_clk_50,
sync_rst_in,
sv_num,
startRound,
ca_code,
p_code,
l_code,
l_code_valid
);
input sys_clk_50;
input sync_rst_in;
input [5:0] sv_num;
input startRound;
output reg [12:0] ca_code;
output [127:0] p_code;
output ... |
/*
*
* Clock generation for GPS modules
* 10.23 MHz for P-code and 1.023 MHz for C/A code
*
*/
module gps_clkgen (
sys_clk_50,
sync_rst_in,
gps_clk_fast,
gps_clk_slow,
gps_rst
);
input sys_clk_50;
input sync_rst_in;
output gps_clk_fast;
output gps_clk_slow;
output gps_rst;
`i... |
module gps_clkgen_test (fast, slow, rst);
output fast, slow, rst;
reg clk = 0;
always
#10 clk <= ~clk;
reg rst_o = 0;
initial begin
#1;
repeat (32) @(negedge clk)
rst_o <= 0;
repeat (32) @(negedge clk)
rst_o <= 1;
repeat (32) @(negedge clk)
rst_o <= 0;
end
gps_clkgen dut(clk, ~cl... |
module gps_test ();
reg clk = 0;
always
#10 clk <= ~clk;
reg start = 0;
reg rst_o = 0;
initial begin
#1;
repeat (32) @(negedge clk)
rst_o <= 0;
repeat (32) @(negedge clk)
rst_o <= 1;
repeat (32) @(negedge clk)
rst_o <= 0;
repeat (32) @(negedge clk)
start <= 1;
end
wire [1... |
module gps_top (
wb_adr_i, wb_cyc_i, wb_dat_i, wb_sel_i,
wb_stb_i, wb_we_i,
wb_ack_o, wb_err_o, wb_dat_o,
wb_clk_i, wb_rst_i, int_o
);
parameter dw = 32;
parameter aw = 32;
input [aw-1:0] wb_adr_i;
input wb_cyc_i;
input [dw-1:0] wb_dat_i;
input [3:0] wb_sel_i;
input wb_stb_i;
... |
module pcode(
clk, rst, en, sat,
preg
);
parameter SAT_WIDTH = 6;
parameter SREG_WIDTH = 37;
parameter XREG_WIDTH = 12;
//parameter PREG_WIDTH = 32;
parameter ini_x1a=12'b001001001000;
parameter ini_x1b=12'b010101010100;
parameter ini_x2a=12'b100100100101;
parameter ini_x2b=12'b0... |
# GPS code generator
Generates three codes used for GPS signal correlation (from the perspective of a space vehicle): C/A-code, P-code, and a secure form of P-code that we call L-code. The combination of the P-code generator and the L-code is meant to serve as a surrogate for the M-code generator found in modern secu... |
//------------------------------------------------------------------
// Simulator directives.
//------------------------------------------------------------------
`timescale 1ns/100ps
//------------------------------------------------------------------
// Test module.
//------------------------------------------------... |
//////////////////////////////////////////////////////////////////////
//// ////
//// timescale.v ////
//// ////
//// ... |
/* Copyright (c) 2016-2017 by the author(s)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, ... |
/* Copyright (c) 2017 by the author(s)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publi... |
/* Copyright (c) 2013 by the author(s)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publi... |
/* Copyright (c) 2013-2018 by the author(s)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, ... |
/* Copyright (c) 2013-2017 by the author(s)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, ... |
/* Copyright (c) 2015 by the author(s)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publi... |
/* Copyright (c) 2015 by the author(s)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publi... |
`include "lisnoc_def.vh"
`define FLIT_WIDTH 34
// Type of flit
// The coding is chosen, so that
// type[0] signals that this is the first flit of a packet
// type[1] signals that this is the last flit of a packet
`define FLIT_TYPE_MSB (`FLIT_WIDTH - 1)
`define FLIT_TYPE_WIDTH 2
`define FLIT_TYPE_LSB (`FLIT_TYPE_MSB ... |
/* Copyright (c) 2015 by the author(s)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publi... |
/* Copyright (c) 2015 by the author(s)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publi... |
/* Copyright (c) 2015 by the author(s)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publi... |
/* Copyright (c) 2015 by the author(s)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publi... |
/* Copyright (c) 2015 by the author(s)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publi... |
/* Copyright (c) 2015 by the author(s)
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publi... |
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