Phase 2: SSE streaming, asymmetric rehydration, fine-tuning trigger

Connect to real AMD MI300X via vLLM

Fix module structure: use library crate correctly

Fix build: minimal deps + mock inference, keep new UI & orchestrator

Final ROCm-ready: real inference, orchestrator, proof, polished UI, HIP comments

Add health check endpoint and fix port

Deploy RustVital-AMD to HF Space