Henry Shulayev Barnes commited on
Commit
982f68d
·
1 Parent(s): 488732d

Fix Loihi parity claims

Browse files
Files changed (2) hide show
  1. README.md +1 -1
  2. app.py +1 -5
README.md CHANGED
@@ -22,7 +22,7 @@ For full-scale hardware-accurate simulations, use the [Catalyst Cloud API](https
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  ## Features
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- - **Processor comparison** — N1 (Loihi 1 parity) vs N2 (Loihi 2 parity) side-by-side
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  - **Hardware constraint validation** — check if your network fits on the target processor
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  - **Live LIF simulation** — configure neurons, connections, and topology
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  - **Spike raster visualisation** — see firing patterns across populations
 
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  ## Features
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+ - **Processor comparison** — N1 and N2 side-by-side
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  - **Hardware constraint validation** — check if your network fits on the target processor
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  - **Live LIF simulation** — configure neurons, connections, and topology
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  - **Spike raster visualisation** — see firing patterns across populations
app.py CHANGED
@@ -20,7 +20,6 @@ PROCESSORS = {
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  "graded_spike_bits": 8,
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  "learning_opcodes": 14,
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  "max_axon_delay": 63,
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- "parity": "Intel Loihi 1",
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  "neuron_models": ["LIF"],
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  "features": [
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  "Dendritic compartments (4 per neuron)",
@@ -39,7 +38,6 @@ PROCESSORS = {
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  "graded_spike_bits": 8,
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  "learning_opcodes": 14,
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  "max_axon_delay": 63,
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- "parity": "Intel Loihi 2",
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  "neuron_models": ["LIF", "CUBA", "ALIF", "Izhikevich", "Custom"],
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  "features": [
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  "Programmable neuron models (microcode engine)",
@@ -326,7 +324,6 @@ def get_processor_info(processor):
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  """Return markdown specs for selected processor."""
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  spec = PROCESSORS[processor]
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  md = f"## Catalyst {processor}\n\n"
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- md += f"**Parity**: {spec['parity']}\n\n"
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  md += f"| Spec | Value |\n|------|-------|\n"
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  md += f"| Cores | {spec['cores']} |\n"
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  md += f"| Neurons/core | {spec['neurons_per_core']:,} |\n"
@@ -370,7 +367,6 @@ Configure networks, validate hardware constraints, and run simulations — all i
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  | | **N1** | **N2** |
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  |---|---|---|
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- | **Parity** | Intel Loihi 1 | Intel Loihi 2 |
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  | **Cores** | 128 | 128 |
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  | **Neurons/core** | 1,024 | 1,024 |
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  | **Total neurons** | 131,072 | 131,072 |
@@ -381,7 +377,7 @@ Configure networks, validate hardware constraints, and run simulations — all i
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  | **Max axon delay** | 63 timesteps | 63 timesteps |
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  | **Key advance** | Foundation | Programmable neuron microcode engine |
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- The **N1** is a complete neuromorphic processor with full Loihi 1 parity 128 cores, on-chip learning, dendritic computation.
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  The **N2** adds a **programmable microcode engine** for custom neuron models. Instead of hardwired LIF, you can program arbitrary neuron dynamics — CUBA, ALIF, Izhikevich, or anything you design.
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  "graded_spike_bits": 8,
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  "learning_opcodes": 14,
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  "max_axon_delay": 63,
 
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  "neuron_models": ["LIF"],
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  "features": [
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  "Dendritic compartments (4 per neuron)",
 
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  "graded_spike_bits": 8,
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  "learning_opcodes": 14,
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  "max_axon_delay": 63,
 
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  "neuron_models": ["LIF", "CUBA", "ALIF", "Izhikevich", "Custom"],
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  "features": [
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  "Programmable neuron models (microcode engine)",
 
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  """Return markdown specs for selected processor."""
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  spec = PROCESSORS[processor]
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  md = f"## Catalyst {processor}\n\n"
 
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  md += f"| Spec | Value |\n|------|-------|\n"
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  md += f"| Cores | {spec['cores']} |\n"
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  md += f"| Neurons/core | {spec['neurons_per_core']:,} |\n"
 
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  | | **N1** | **N2** |
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  |---|---|---|
 
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  | **Cores** | 128 | 128 |
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  | **Neurons/core** | 1,024 | 1,024 |
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  | **Total neurons** | 131,072 | 131,072 |
 
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  | **Max axon delay** | 63 timesteps | 63 timesteps |
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  | **Key advance** | Foundation | Programmable neuron microcode engine |
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+ The **N1** is a complete 128-core neuromorphic processor with on-chip STDP learning, dendritic compartments, graded spikes, and programmable axonal delays — a Loihi-class feature set.
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  The **N2** adds a **programmable microcode engine** for custom neuron models. Instead of hardwired LIF, you can program arbitrary neuron dynamics — CUBA, ALIF, Izhikevich, or anything you design.
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