Initial release: 130,409 ngspice-simulated SPICE netlists on SKY130

LICENSE

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LICENSES/LICENSE-AnalogGym

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+BSD 3-Clause License
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+Copyright (c) 2024, CODA-Team
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LICENSES/LICENSE-AnalogToBi

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+The upstream repository at https://github.com/Seungmin0825/AnalogToBi
+declares itself under the MIT License in its README.md:
+
+  > ## License
+  > This project is licensed under the MIT License. See [LICENSE](LICENSE) for details.
+
+The repository itself does not ship a LICENSE file at the path it references
+(observed as of commit HEAD on the `main` branch on 2026-04-20). The standard
+MIT License text below is reproduced here to satisfy the "above copyright
+notice and this permission notice shall be included" clause when redistributing
+derivatives of the AnalogToBi netlists as part of this corpus.
+
+----------------------------------------------------------------------
+
+MIT License
+
+Copyright (c) AnalogToBi authors (Seungmin Lee et al.)
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+copies of the Software, and to permit persons to whom the Software is
+furnished to do so, subject to the following conditions:
+
+The above copyright notice and this permission notice shall be included in all
+copies or substantial portions of the Software.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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+AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+SOFTWARE.

LICENSES/LICENSE-OCB

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+MIT License
+
+Copyright (c) 2023 zehao-dong
+
+Permission is hereby granted, free of charge, to any person obtaining a copy
+of this software and associated documentation files (the "Software"), to deal
+in the Software without restriction, including without limitation the rights
+to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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+copies or substantial portions of the Software.
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+SOFTWARE.

NOTICE

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+Analog SPICE Circuits on SKY130
+Copyright 2026 Philip Pilgerstorfer
+
+This dataset is released under the Apache License, Version 2.0 (see LICENSE).
+
+================================================================================
+This dataset contains Derivative Works of three upstream corpora. Their
+original licences are reproduced verbatim in the LICENSES/ directory and MUST
+be included in any downstream redistribution of this dataset.
+================================================================================
+
+
+1. Open Circuit Benchmark (OCB) — Ckt-Bench-101 + Ckt-Bench-301
+   Upstream: https://github.com/zehao-dong/CktGNN
+   Paper:    Z. Dong, W. Cao, M. Zhang, D. Tao, Y. Chen, X. Zhang.
+             "CktGNN: Circuit Graph Neural Network for Electronic Design
+             Automation." ICLR 2023.
+   Licence:  MIT (see LICENSES/LICENSE-OCB)
+   Use in this dataset:
+     The 60,000 rows where `source_dataset == "ocb"` are derived from OCB's
+     behavioural opamp graphs. Each graph was remapped from its upstream
+     (gm, R, C) sub-circuit representation to a transistor-level SKY130
+     netlist via an equivalent-subcircuit library, then simulated in ngspice.
+     Circuit IDs preserve the upstream sub-benchmark partition:
+        ocb_sky130_101_*   — 10,000 graphs (Ckt-Bench-101, diversity sample)
+        ocb_sky130_301_*   — 50,000 graphs (Ckt-Bench-301, BO-curated)
+
+
+2. AnalogToBi
+   Upstream: https://github.com/Seungmin0825/AnalogToBi
+   Paper:    Seungmin Lee et al. "AnalogToBi: Device-Level Analog Circuit
+             Topology Generation via Bipartite Graph and Grammar-Guided
+             Decoding."
+   Licence:  MIT (declared in upstream README; see LICENSES/LICENSE-AnalogToBi
+             for the note on the missing upstream LICENSE file and the
+             reproduced standard MIT text)
+   Use in this dataset:
+     The 67,736 converged + 2,177 failed rows where
+     `source_dataset == "analogtobi"` are derived from AnalogToBi's 3,350
+     textbook + paper analog-circuit topologies. This includes a 1× default-
+     sizing baseline and a 20-point Latin-Hypercube sweep over W, L, Ibias,
+     and CL applied by our simulation pipeline before ngspice runs. Upstream
+     netlists ship in Cadence Spectre dialect; our pipeline converted them
+     to ngspice dialect.
+
+
+3. AnalogGym
+   Upstream: https://github.com/CODA-Team/AnalogGym
+   Paper:    CODA-Team. "AnalogGym: An Open and Practical Testing Suite for
+             Analog Circuit Synthesis." ICCAD 2024.
+             doi:10.1145/3676536.3697117
+   Licence:  BSD 3-Clause (see LICENSES/LICENSE-AnalogGym)
+   Use in this dataset:
+     The 500 rows where `source_dataset == "analoggym"` are derived from
+     AnalogGym's 22 ngspice-ready SKY130 topologies (16 amplifiers + 1 LDO
+     + 4 voltage references + 1 charge pump), each expanded by a 20-point
+     LHS sweep. The charge-pump sub-circuit is a structural homage of the
+     SMIC 130 nm PLL charge pump from the AnalogGym repo — model-name
+     tokens were remapped to SKY130 equivalents and layout-dependent
+     parameters were stripped.
+     Per the BSD 3-Clause no-endorsement clause: neither the names of
+     AnalogGym, CODA-Team, nor any of their contributors may be used to
+     endorse or promote products derived from this dataset without specific
+     prior written permission.
+
+
+Third-party tools and data referenced but NOT redistributed
+================================================================================
+
+  - SkyWater SKY130 PDK (Apache 2.0) — https://github.com/google/skywater-pdk.
+    The shipped netlists reference SKY130 `.lib` and `.model` names (e.g.
+    `sky130_fd_pr__nfet_01v8`) but do not embed any PDK model files.
+    Users wishing to re-simulate must install the PDK themselves (e.g.
+    via https://github.com/efabless/volare).
+
+  - ngspice — http://ngspice.sourceforge.net/. The simulator used to
+    produce every row's metrics. Not redistributed.
+
+  - AICircuit (Avestimehr Research Group, MIT licence) was evaluated for
+    inclusion and deliberately excluded from this release. Its labels are
+    produced by Cadence Spectre against a closed FreePDK45 kit and cannot
+    be reproduced with open-source tooling, so shipping its CSV metrics
+    would have introduced numbers no open pipeline can verify.

README.md

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----
-license: apache-2.0
----
+---
+license: apache-2.0
+language:
+  - en
+task_categories:
+  - graph-ml
+  - tabular-regression
+  - tabular-classification
+size_categories:
+  - 100K<n<1M
+pretty_name: Analog SPICE Circuits on SKY130
+tags:
+  - analog
+  - analog-ic
+  - spice
+  - spice-netlist
+  - ngspice
+  - sky130
+  - graph-neural-networks
+  - pyg
+  - netlist
+  - eda
+source_datasets:
+  - zehao-dong/CktGNN
+  - Seungmin0825/AnalogToBi
+  - CODA-Team/AnalogGym
+configs:
+  - config_name: default
+    data_files:
+      - split: train
+        path: default/train-*.parquet
+      - split: validation
+        path: default/validation-*.parquet
+      - split: test
+        path: default/test-*.parquet
+      - split: failed
+        path: default/failed-*.parquet
+  - config_name: with_testbench
+    data_files:
+      - split: train
+        path: with_testbench/train-*.parquet
+      - split: validation
+        path: with_testbench/validation-*.parquet
+      - split: test
+        path: with_testbench/test-*.parquet
+      - split: failed
+        path: with_testbench/failed-*.parquet
+---
+
+# Dataset Card for Analog SPICE Circuits on SKY130
+
+**130,409 ngspice-simulated SPICE netlists on the open-source SkyWater SKY130 PDK**, unified from three upstream sources into a single HuggingFace-loadable schema with deterministic topology-aware train/validation/test splits. Designed as a supervised `(SPICE netlist → performance metrics)` corpus for training of models for analog circuit design.
+
+**Fully open toolchain.** Analog-EDA datasets commonly require a commercial SPICE simulator and/or a closed foundry PDK to reproduce or extend — here, every row can be re-simulated with `ngspice` against SKY130 using only open-source tools. The `with_testbench` config ships the exact ngspice-ready SPICE on every row so `ngspice -b row.testbench_spice` bit-reproduces any shipped metric. See [Reproducibility](#reproducibility).
+
+### Configs
+
+| Config | Download size | Columns | Use when |
+|---|---:|---|---|
+| `default` | ~85 MB | `circuit_id`, `base_circuit_id`, `topology`, `source_dataset`, `pdk`, `sim_params`, `converged`, `error`, `metrics`, `netlist_json` | Training a GNN on shipped metrics. |
+| `with_testbench` | ~125 MB | everything in `default` + `testbench_spice` | Re-simulating or verifying any row end-to-end with ngspice. |
+
+Both configs share the same 4 splits (`train` / `validation` / `test` / `failed`) and the same `base_circuit_id → split` map (`splits.json`), so a model trained on `default/train` evaluates identically on `with_testbench/test`.
+
+```python
+from datasets import load_dataset
+
+# Lean — for GNN training
+ds = load_dataset("pphilip/analog-circuits-sky130", split="train")
+
+# With runnable SPICE — for re-simulation / extension
+ds = load_dataset("pphilip/analog-circuits-sky130", "with_testbench", split="train")
+```
+
+## Dataset Summary
+
+Every row pairs a **transistor-level SPICE netlist** with the performance metrics measured from an **ngspice** simulation (DC operating point, AC response, transient). The **`netlist_json`** column carries a lossless typed-pin primitive that can be projected into three common GNN input shapes (bipartite / bus / node-centric) via the accompanying converter library. 50 topology families span op-amps, LDOs, bandgap references, switched-capacitor samplers, power converters, VCOs, mixers, LNAs, PAs, and more.
+
+Splits are **topology-aware**: whole topology classes (or whole structural graphs, for OCB where everything is one class) are assigned to exactly one of train / validation / test, so held-out evaluation measures generalisation across unseen topologies, not just unseen parameter samples.
+
+- **Total rows:** 130,409 (128,226 converged + 2,183 failed)
+- **Topology families:** 49
+- **Distinct structural graphs:** 63,354
+- **Netlist dialect:** SPICE (ngspice dialect, `ngbehavior=hs`, HSPICE-compatible)
+- **PDK:** SkyWater SKY130 (130 nm CMOS, 1.8 V, BSIM4 TT corner)
+- **Simulator:** ngspice 46 with OSDI + KLU
+- **Parameter sweeps:** 20-point Latin-Hypercube Samples over `(W_scale, L_scale, I_bias_scale, C_load)` on AnalogToBi + AnalogGym subsets; OCB is one-sample-per-graph (60K distinct graphs).
+
+## Supported Tasks
+
+Three primary task variants (see `dataset_schema.md` for code):
+
+1. **netlist → metrics** — predict `dc_gain_dB`, `ugf_Hz`, `phase_margin_deg`, `power_W`, etc. from the graph + parameters. Regression. Primary benchmark for GNN architectures.
+2. **metrics → topology** — classify the topology family or the specific structural graph from metric vectors. Classification (49 classes) or retrieval (63K graphs).
+3. **metrics → sizing** — predict W/L/bias currents from target metrics + topology. Regression, conditioned on topology. Matches the FALCON/AICircuit inverse-design task shape.
+
+The topology-aware splits make all three tasks measure generalisation rather than interpolation.
+
+## Languages
+
+SPICE netlists are programming-language artefacts (`code`), not natural language. Metric columns are numeric.
+
+## Dataset Structure
+
+### Splits
+
+One unified dataset with four splits. Group-aware by `base_circuit_id` — every structural graph (and all its sweep siblings) is assigned to exactly one of train / validation / test, so held-out evaluation is fair across unseen circuits.
+
+| Split | Rows | Groups (distinct graphs) | Description |
+|---|---:|---:|---|
+| `train` | 89,708 | 44,348 | Primary training set. |
+| `validation` | 19,116 | 9,503 | Held-out. |
+| `test` | 19,402 | 9,503 | Held-out. |
+| `failed` | 2,183 | — | Simulation errors (non-convergence, timeouts, singular matrices). Same `netlist_json` as converged rows; `metrics` may be empty. Useful for failure-mode study. |
+
+70/15/15 groupwise split with `seed=42`; the `splits.json` file in the repo maps `base_circuit_id → split` for reproducibility.
+
+### Upstream-source breakdown
+
+All four upstream corpora are pooled into the above splits. The **`source_dataset`** column tells you which upstream each row came from; **`sim_params.sweep`** (JSON) tells you whether the row is a default-sizing sample or a specific LHS point.
+
+| `source_dataset` | Upstream | Distinct graphs | Families | Sweeps/graph | Converged | Failed |
+|---|---|---:|---:|---:|---:|---:|
+| `ocb` | CktGNN behavioural opamps remapped to SKY130 | 59,990 | 1 (all opamps) | 1.0 | 59,990 | 10 |
+| `analogtobi` (1× + 20× LHS) | AnalogToBi textbook topologies | 3,263 | 48 | ~21 (1 default + 20 LHS) | 67,736 | 2,177 |
+| `analoggym` | AnalogGym amps + LDO + VRef + charge pump, 20× LHS | 25 | 4 | 20.0 | 500 | 0 |
+
+**Filtering by upstream:**
+
+```python
+from datasets import load_dataset
+ds = load_dataset("pphilip/analog-circuits-sky130", split="train")
+
+# All AnalogToBi rows
+atb = ds.filter(lambda r: r["source_dataset"] == "analogtobi")
+
+# Only LHS sweep rows (exclude default-sizing baseline)
+import json
+sweep_only = ds.filter(lambda r: json.loads(r["sim_params"]).get("sweep") is not None)
+
+# One topology family
+opamps = ds.filter(lambda r: r["topology"] == "operational_amplifier")
+```
+
+**Why pool everything under one config instead of per-source configs?** Because split membership depends on `base_circuit_id`, not on source. Separate configs would force consumers to manage their own global no-leakage rule across configs — error-prone. One pool + column filters keeps the fair-eval guarantee intact.
+
+### Topology families
+
+49 families across all sources, skewed toward opamp for structural reasons (OCB contributes 60K opamp graphs). The table below lists every family with its total converged sample count, the number of distinct structural graphs it covers, and which upstream sources include it. Filter with `ds.filter(lambda r: r["topology"] == "<family>")`.
+
+| Family | Samples | Graphs | Sources |
+|---|---:|---:|---|
+| operational_amplifier | 70,595 | 60,496 | analoggym, analogtobi, ocb |
+| switched_capacitor_sampler | 18,236 | 871 | analogtobi |
+| ldo | 9,517 | 454 | analoggym, analogtobi |
+| bandgap_reference | 7,101 | 343 | analoggym, analogtobi |
+| power_converter | 5,498 | 269 | analogtobi |
+| vco | 1,515 | 78 | analogtobi |
+| current_mirror_bias | 1,428 | 68 | analogtobi |
+| feedback | 966 | 46 | analogtobi |
+| lna | 821 | 40 | analogtobi |
+| frequency_response | 777 | 37 | analogtobi |
+| high_perf_opamp | 767 | 37 | analogtobi |
+| noise | 735 | 35 | analogtobi |
+| mixer | 708 | 34 | analogtobi |
+| switched_capacitor | 693 | 33 | analogtobi |
+| oscillator | 651 | 39 | analogtobi |
+| single_stage_amplifier | 546 | 26 | analogtobi |
+| stability_compensation | 525 | 25 | analogtobi |
+| cmos_amplifier | 525 | 25 | analogtobi |
+| power_amplifier | 504 | 24 | analogtobi |
+| frequency_synthesizer | 462 | 22 | analogtobi |
+| differential_amplifier | 462 | 22 | analogtobi |
+| continuous_time_filter | 437 | 21 | analogtobi |
+| analog_subcircuit | 420 | 20 | analogtobi |
+| current_mirror_amplifier | 378 | 18 | analogtobi |
+| sample_hold | 357 | 17 | analogtobi |
+| output_stage | 336 | 16 | analogtobi |
+| transceiver | 315 | 15 | analogtobi |
+| cmos_opamp | 315 | 15 | analogtobi |
+| rf_basic | 252 | 12 | analogtobi |
+| single_transistor_amplifier | 252 | 12 | analogtobi |
+| nanometer_design | 252 | 12 | analogtobi |
+| fully_differential_opamp | 252 | 12 | analogtobi |
+| comparator | 236 | 24 | analogtobi |
+| misc | 231 | 11 | analogtobi |
+| voltage_regulator | 231 | 11 | analogtobi |
+| unknown | 189 | 9 | analogtobi |
+| nonlinearity_mismatch | 147 | 7 | analogtobi |
+| nonlinear | 126 | 6 | analogtobi |
+| adc | 71 | 4 | analogtobi |
+| transconductance_amplifier | 63 | 3 | analogtobi |
+| layout_packaging | 63 | 3 | analogtobi |
+| dac | 63 | 3 | analogtobi |
+| power | 42 | 2 | analogtobi |
+| current_source | 42 | 2 | analogtobi |
+| converter | 41 | 2 | analogtobi |
+| cmos_processing | 21 | 1 | analogtobi |
+| filter | 21 | 1 | analogtobi |
+| fractional_n_synthesizer | 21 | 1 | analogtobi |
+| charge_pump | 20 | 1 | analoggym |
+
+**Observations:**
+
+- **Opamps dominate by sample count** (70.5K / 128.6K = 55%) due to OCB's 60K-graph contribution, but only 4 of the 49 families appear in more than one upstream source (opamp, LDO, bandgap, charge-pump). The 45 other families are AnalogToBi-only.
+- **Three families cross all three device-level sources**: `operational_amplifier`, `ldo`, `bandgap_reference`. These are the only families where a model can be trained on one upstream and tested on another.
+- **Long tail** — 20 families have <500 samples. Useful for few-shot / meta-learning evaluation but small for end-to-end training in isolation.
+- **`charge_pump`** is exclusive to `analoggym` and has only 20 samples (1 graph × 20 sweeps) — the most specialised class in the corpus.
+
+### Data Instances
+
+One row:
+
+```json
+{
+  "circuit_id": "analogtobi_0705_s003",
+  "base_circuit_id": "analogtobi_0705",
+  "topology": "operational_amplifier",
+  "source_dataset": "analogtobi",
+  "pdk": "sky130",
+  "sim_params": "{\"vdd\": 1.8, \"vth\": 0.5, \"vov\": 0.2, \"testbench\": \"OpampTestbench\", \"sweep\": {\"design\": {\"w_scale\": 1.34, \"l_scale\": 0.92}, \"test\": {\"ib_scale\": 0.67, \"cl_F\": 4.2e-12}}, ...}",
+  "converged": true,
+  "error": "",
+  "metrics": "{\"dc_gain_dB\": 38.2, \"ugf_Hz\": 1.25e6, \"phase_at_ugf_deg\": 52.3, \"power_W\": 0.00083, \"vout_dc_V\": 0.87, \"vdd_current_A\": 4.6e-4}",
+  "netlist_json": "{\"nets\":[{\"name\":\"VDD\",\"role\":\"supply_pos\",\"external\":true},...],\"devices\":[{\"name\":\"M1\",\"type\":\"nmos\",\"model\":\"nmos4\",\"pins\":[{\"role\":\"D\",\"net\":\"vout\"},{\"role\":\"G\",\"net\":\"vinn\"},{\"role\":\"S\",\"net\":\"tail\"},{\"role\":\"B\",\"net\":\"VSS\"}],\"params\":{}},...]}"
+}
+```
+
+### Data Fields
+
+| Column | Type | Description |
+|---|---|---|
+| `circuit_id` | string | Unique row id. Sweep siblings share a `base_circuit_id` prefix + `_sNNN` suffix. |
+| `base_circuit_id` | string | Structural identity, shared across sweep siblings of one graph. |
+| `topology` | string | Coarse topology family (one of 50). |
+| `source_dataset` | string | `ocb`, `analogtobi`, or `analoggym`. |
+| `pdk` | string | Always `sky130` in this release. |
+| `sim_params` | string (JSON) | Full simulation parameters for reproducibility: PDK config (VDD, Vth, Vov, model_map), testbench class, convergence options, and sweep point `{design: {...}, test: {...}}`. |
+| `converged` | bool | Whether the ngspice DC operating point + requested analyses completed. |
+| `error` | string | Failure mode if `converged=false`: `no_convergence`, `singular_matrix`, `timeout`, `sim_error`, `no_output_port`. |
+| `metrics` | string (JSON) | All output metrics for this row. Schema varies by testbench (op-amp vs LDO vs bandgap, etc.). |
+| `netlist_json` | string (JSON) | Lossless typed-pin graph primitive — see "Graph Representation" below. |
+
+### Data Splits
+
+| Config | Train | Val | Test |
+|---|---:|---:|---:|
+| `ocb` | 41,994 | 8,998 | 8,998 |
+| `analogtobi` | 3,001 | 95 | 128 |
+| `analogtobi_sweep20` | 60,573 | 1,753 | 2,577 |
+| `analoggym_sweep20` | 400 | 20 | 80 |
+
+Splits are **group-aware**: for OCB, groups are `base_circuit_id` (so no sweep siblings cross the split boundary); for the rest, groups are `topology` labels (so whole families are held out at eval time).
+
+### Graph Representation
+
+Each row's `netlist_json` carries a canonical primitive that can be projected into any of the three common PyG shapes (bipartite / bus / node-centric) at load time — without re-parsing the SPICE text. Consumers parse the JSON string and build the representation they need; an example bus-style projection is shown in the "How to Use" section below.
+
+Primitive schema (compact JSON stored per row):
+
+```json
+{
+  "nets": [
+    {"name": "VDD",  "role": "supply_pos", "external": true},
+    {"name": "NET1", "role": "internal",    "external": false}
+  ],
+  "devices": [
+    {"name": "M1", "type": "nmos", "model": "nmos4",
+     "pins": [{"role": "D", "net": "NET1"}, {"role": "G", "net": "VIN"},
+              {"role": "S", "net": "VSS"}, {"role": "B", "net": "VSS"}],
+     "params": {"W": 10.0, "L": 0.5}}
+  ]
+}
+```
+
+Pin roles: MOSFET `D G S B`; BJT `C B E SUB`; 2-terminal `P N`. Device types: `nmos pmos npn pnp res cap ind isrc vsrc other`.
+
+## Dataset Creation
+
+### Curation Rationale
+
+Open-source analog circuit design tooling has lacked a labelled benchmark corpus at the scale GNNs expect. Existing datasets are either topology-only (AnalogToBi: 3,350 textbook graphs, no sizing), Cadence-locked (AnalogGym PLL, AICircuit), or behavioural-only (OCB: 60K opamp graphs without transistor-level metrics). This dataset unifies three permissively-licensed upstream sources under a single open PDK (SKY130) and simulator (ngspice), so the entire pipeline — netlist → simulator → labels → graph representation — is reproducible from open source.
+
+### Source Data
+
+**OCB** (Open Circuit Benchmark, 60,000 graphs). Zehao Dong et al., "CktGNN: Circuit Graph Neural Network for Electronic Design Automation", ICLR 2023. Behavioural `(gm, R, C)` opamp subgraphs remapped to SKY130 transistor-level netlists using a library of equivalent sub-circuits. MIT License. The 60K graphs come from **two upstream sub-benchmarks** which this release keeps pooled under the `ocb` `source_dataset` value but remains distinguishable via the `circuit_id` prefix:
+
+- **Ckt-Bench-101** (10,000 graphs, `circuit_id` like `ocb_sky130_101_*`) — the paper's diversity-focused sample; per the CktGNN authors' data-generation procedure, topologies here are drawn broadly across the opamp graph space without a performance prior.
+- **Ckt-Bench-301** (50,000 graphs, `circuit_id` like `ocb_sky130_301_*`) — generated by a Bayesian-optimisation search in the CktGNN graph latent space. This is **not an i.i.d. sample**: graphs were selected because the BO thought they'd score high on the FoM metric, so the 301 subset is distribution-shifted toward high-performance opamps. Downstream models trained on it inherit that prior — useful if you want performance-focused training, a caveat if you want an unbiased opamp-graph distribution.
+
+Filter with `circuit_id` prefix if you want just one:
+
+```python
+ds_101 = ds.filter(lambda r: r["circuit_id"].startswith("ocb_sky130_101_"))  # 10K diverse
+ds_301 = ds.filter(lambda r: r["circuit_id"].startswith("ocb_sky130_301_"))  # 50K BO-curated
+```
+
+**AnalogToBi** (3,350 topologies, 49 families). Seungmin Lee et al. Textbook + paper analog circuits (Razavi, Camenzind, Carusone/Johns/Martin, Gray/Hurst/Lewis/Meyer, Allen/Holberg, RF Microelectronics, plus assorted papers). Topology-only — our pipeline supplies default sizing and a 20-LHS sweep per topology. MIT License.
+
+**AnalogGym** (22 ngspice-ready topologies: 16 amplifiers + 1 LDO + 4 voltage references + 1 charge pump). CODA-Team, ICCAD 2024. Native SKY130 netlists with upstream sizing. Charge-pump is a structural homage — the upstream targets SMIC 130 nm devices at 3.3V, remapped here to SKY130 1.8V core devices; AnalogGym's published current-mismatch targets are not reproducible at this voltage. BSD 3-Clause.
+
+**PDK.** SkyWater SKY130 (Apache 2.0), accessed via [volare](https://github.com/efabless/volare). Only `.lib` and `.model` references appear in the shipped netlists; no PDK model files are redistributed as part of this dataset.
+
+### Simulation Pipeline
+
+Every row was generated by the same deterministic pipeline:
+
+1. **Parse** upstream netlists via per-source readers — one reader per source handles Spectre→ngspice dialect conversion, model-name remapping (proprietary PDK tokens → SKY130 equivalents), and the ingest of AnalogGym's Markdown-inlined voltage-reference netlists.
+2. **Emit testbench** per topology type: op-amp AC, LDO AC-on-VDD, bandgap DC+temp-sweep, comparator transient, VCO transient, mixer AC+LO, PA AC+50Ω.
+3. **Bias inference** via graph-distance BFS + Vth/Vov formulas, plus self-biasing current mirrors for gate-only bias ports (follows AnalogToBi Appendix G).
+4. **Apply 20-point LHS sweep** over `(W_scale ∈ [0.3,3.0], L_scale ∈ [0.7,1.5], I_bias_scale ∈ [0.3,3.0], C_load ∈ [10fF,100pF])` with a post-sweep `W_MAX = 500µm` clamp to stay inside BSIM4 bin coverage.
+5. **Run ngspice 46** with per-PDK convergence options (`gmin=1e-10`, `gminsteps=10` for SKY130) and a 60-second per-sim timeout.
+6. **Extract metrics** from `.measure` statements + control-block prints.
+7. **Merge** per-batch outputs globally with group-aware splits (`base_circuit_id`, seed 42) applied once across all sources.
+
+The `sim_params` column on every row captures the full reproducibility-relevant configuration (PDK tokens, testbench class, convergence options, sweep point); `netlist_json` captures the exact transistor-level graph that went into ngspice. Together with the upstream raw data, these are sufficient to reproduce any row with the open-source toolchain listed above.
+
+### Personal and Sensitive Information
+
+None. The dataset contains circuit netlists and their simulated electrical metrics; no personal data, no text generated by humans beyond device/net naming conventions.
+
+## Considerations for Using the Data
+
+### Social Impact
+
+Open analog design tooling is a long-standing gap in EDA. A labelled benchmark at this scale enables researchers without Cadence licences to develop and evaluate analog-domain GNNs, lowering the barrier to entry for analog circuit ML. We expect primary uptake in academic circuit-design labs and hobbyist/open-source hardware communities.
+
+### Discussion of Biases
+
+- **Opamp over-representation.** After rebalancing with 20× sweeps, op-amps still account for ~55% of rows due to OCB's 60K-graph contribution. Training a `(graph, metrics)` model without stratified sampling will bias the encoder toward opamp features. The long tail of 48 non-opamp families averages ~1,200 rows each — enough for within-family `metrics → sizing` work but small for transfer-learning claims.
+- **OCB-301 is BO-curated, not random.** 50K of the 60K OCB rows come from Ckt-Bench-301, which the original CktGNN authors generated via Bayesian optimisation in the graph latent space. That sub-corpus is distribution-shifted toward high-FoM opamps; 301 is not an unbiased sample of the opamp graph space. Ckt-Bench-101 (10K rows, `ocb_sky130_101_*`) is the upstream's diversity-focused sample and is closer to uniform. Train on `ocb` indiscriminately and the opamp encoder inherits the 301 prior. Filter by the `circuit_id` prefix if you want to remove that bias.
+- **Default-sizing artefacts.** AnalogToBi ships topology-only; our pipeline supplies uniform default W = 10 µm, L = 0.5 µm on the 1× baseline rows. Circuits where performance depends on heterogeneous sizing (cascode headroom, compensation-cap tuning) are under-represented at their intended operating points. Use the 20× LHS sweep rows (the majority of AnalogToBi rows) for downstream work that needs realistic sizings.
+- **Testbench-topology mismatch for non-amplifier circuits.** Many non-opamp topologies (switched-capacitor samplers, filters, mixers, LNAs, sample-hold, etc.) are simulated with the op-amp AC testbench — the only testbench type applied to most AnalogToBi families in this release. Their `metrics` reflect the AC response of the circuit, which is a real physical quantity but often not the metric a circuit engineer would quote for that topology (e.g., SC samplers don't have a meaningful small-signal gain). The concrete symptom: **~22% of converged rows have `|dc_gain_dB| < 0.1`**, dominated by OCB opamps (19K rows with degenerate structure after behavioural→transistor remap) and AnalogToBi SC samplers (5.6K rows). Treat these as testbench-AC measurements, not as the topology's canonical performance metric.
+- **Family-specific `metrics` keys.** Not every row carries `dc_gain_dB`. 7.6% of converged rows instead emit testbench-appropriate metrics: bandgaps give `vout_27 / vout_m40 / vout_125` (temperature sweep), VCOs give `osc_freq_Hz`, comparators and the charge-pump give `prop_delay_s`. See `dataset_schema.md` for the full per-testbench metric catalogue.
+- **Single-PDK.** Everything is SKY130 1.8V. Models trained here should not be assumed to transfer to other process nodes without explicit retraining.
+- **Convergence bias.** The 2,187 failed rows are preserved in the `failed` split, not silently dropped. Rows there carry the same `netlist_json` as converged rows but empty `metrics`, letting consumers study the boundary between convergent and divergent circuits.
+
+### Other Known Limitations
+
+- `sim_params.sweep.design.w_scale` and `l_scale` are applied uniformly across every MOSFET. Real circuit design varies W and L per-transistor; our sweep is a global perturbation, not a fine-grained sizing exploration.
+- AnalogGym's 4 voltage-reference circuits come with redacted-PDK netlists; our pipeline strips layout-dependent parameters (`sd`, `ad`, `ps`, etc.) and remaps SMIC/proprietary model-name tokens to SKY130. The graph structure is intact; absolute metric values reflect SKY130, not the upstream process.
+- The `.spice` netlist column is not included in this release (too large for Hub storage). Derive it from `netlist_json` via the repository's converter if needed, or re-run the pipeline from the upstream raw data.
+
+## Additional Information
+
+### Dataset Curators
+
+Philip Pilgerstorfer (`pphilip` on hf).
+
+### Licensing Information
+
+This dataset is released under the **Apache License 2.0** (`LICENSE`). Upstream source-dataset licences are included in `LICENSES/` and must be carried forward by any downstream redistribution:
+
+- `LICENSES/LICENSE-OCB`: MIT (CktGNN authors, Washington University in St. Louis)
+- `LICENSES/LICENSE-AnalogToBi`: MIT (Seungmin Lee et al.)
+- `LICENSES/LICENSE-AnalogGym`: BSD 3-Clause (CODA-Team)
+
+### Citation Information
+
+If you use this dataset, please cite it and all upstream sources:
+
+```bibtex
+@dataset{pilgerstorfer_analog_circuits_sky130,
+  title        = {{Analog SPICE Circuits on SKY130}},
+  author       = {Pilgerstorfer, Philip},
+  year         = 2026,
+  publisher    = {Hugging Face},
+  url          = {https://huggingface.co/datasets/pphilip/analog-circuits-sky130}
+}
+
+@inproceedings{dong2023cktgnn,
+  title     = {{CktGNN}: Circuit Graph Neural Network for Electronic Design Automation},
+  author    = {Dong, Zehao and Cao, Weidong and Zhang, Muhan and Tao, Dacheng and Chen, Yixin and Zhang, Xuan},
+  booktitle = {International Conference on Learning Representations (ICLR)},
+  year      = 2023
+}
+
+@misc{lee_analogtobi,
+  title        = {{AnalogToBi}: A Dataset of Analog Circuit Schematics},
+  author       = {Lee, Seungmin and others},
+  howpublished = {\url{https://github.com/Seungmin0825/AnalogToBi}},
+  note         = {MIT License}
+}
+
+@inproceedings{coda2024analoggym,
+  title     = {{AnalogGym}: An Open and Practical Testing Suite for Analog Circuit Synthesis},
+  author    = {{CODA-Team}},
+  booktitle = {International Conference on Computer-Aided Design (ICCAD)},
+  year      = 2024,
+  doi       = {10.1145/3676536.3697117}
+}
+```
+
+### Contributions
+
+Thanks to the CktGNN, AnalogToBi, and AnalogGym teams for making their upstream corpora available under permissive licenses. Thanks to the SkyWater + Google + efabless teams for the SKY130 open PDK and the ngspice team for the open-source simulator.
+
+## Reproducibility
+
+The **`with_testbench`** config ships the exact ngspice-ready SPICE that produced every row's `metrics`. Reproducing any shipped number is three steps:
+
+1. Load the row — `row["testbench_spice"]` is a self-contained SPICE deck.
+2. Substitute `{{SKY130_LIB}}` with your local SKY130 combined/continuous `.lib` path (portability placeholder — the only environment-specific token in the deck).
+3. Run `ngspice -b <spice>` and parse `.meas` output.
+
+The `example_simulate.py` file in this repo does exactly those three steps:
+
+```bash
+# One-time setup
+pip install datasets volare
+volare fetch --pdk sky130
+export SKY130_LIB="$(volare show sky130)/sky130A/libs.tech/combined/continuous/sky130.lib.spice"
+# Install ngspice 46+ via your package manager or from source
+
+# Reproduce the first converged row of the train split
+python example_simulate.py
+
+# Reproduce a specific circuit
+python example_simulate.py --circuit-id analoggym_amp_leung_nmcf_pin_3_s000
+
+# Inspect the reconstructed SPICE without running
+python example_simulate.py --print-spice
+```
+
+Expected output (bit-exact match to four decimal places):
+
+```
+  circuit_id:     analoggym_amp_alfio_raffc_pin_3_s000
+  topology:       operational_amplifier  (source: analoggym)
+  shipped metric: dc_gain_dB = -30.741 dB
+
+Running ngspice…
+  reproduced: dc_gain_dB = -30.741 dB
+  delta:      0.000000 dB  ✓ bit-exact
+```
+
+### Extending the corpus
+
+Every row is a starting point for new samples. You can:
+
+- **Perturb a sweep point.** Edit `sim_params.sweep.design.w_scale` / `l_scale` / `sweep.test.ib_scale` / `cl_F`, rescale the corresponding values in `testbench_spice` (a simple regex on `W=` / `L=` / DC-source values), and run ngspice.
+- **Rewire the DUT.** `netlist_json` is the lossless graph representation: add a device, change a pin's net, and regenerate the SPICE lines. The `with_testbench` column shows you the full deck format your emission needs to match.
+- **Swap the testbench.** Replace the analysis block in `testbench_spice` (the lines after `* --- DUT ---`) with `.tran`, `.noise`, or whatever ngspice analysis you need — the DUT section is already correct.
+
+None of these extensions require a commercial simulator or PDK.
+
+## How to Use
+
+### Load the dataset
+
+```python
+from datasets import load_dataset
+ds = load_dataset("pphilip/analog-circuits-sky130", split="train")
+# also available: "validation", "test", "failed"
+```
+
+### Iterate rows and pull metrics
+
+```python
+import json
+row = ds[0]
+metrics = json.loads(row["metrics"])
+print(f"{row['circuit_id']}: gain = {metrics['dc_gain_dB']:.1f} dB, UGF = {metrics['ugf_Hz']:.2e} Hz")
+```
+
+### Filter to a specific upstream, family, or sweep axis
+
+```python
+# AnalogToBi circuits only
+atb = ds.filter(lambda r: r["source_dataset"] == "analogtobi")
+
+# Only AnalogGym charge pumps
+cp = ds.filter(lambda r: r["topology"] == "charge_pump")
+
+# Only LHS sweep samples (exclude AnalogToBi default-sizing 1× baseline)
+sweep = ds.filter(lambda r: json.loads(r["sim_params"]).get("sweep") is not None)
+```
+
+### Build a PyG graph from `netlist_json`
+
+`netlist_json` is a self-contained JSON string — no pipeline library required. The example below builds a bus-style graph (nets as nodes, devices as edges — FALCON's `graph.json` shape). See `dataset_schema.md` for the full primitive schema and the bipartite / node-centric alternatives.
+
+```python
+import json
+import torch
+from torch_geometric.data import Data
+
+def to_bus(netlist_json: str) -> Data:
+    """Project the row's netlist_json primitive into a bus graph (nets as nodes, devices as edges).
+
+    Every device becomes K*(K-1)/2 parallel edges (all pin-pairs), so a 4-terminal
+    MOSFET adds 6 edges with a shared `device_id` group tag.
+    """
+    from itertools import combinations
+    p = json.loads(netlist_json)
+    net_idx = {n["name"]: i for i, n in enumerate(p["nets"])}
+
+    src, dst, dev_id, dev_type = [], [], [], []
+    type_vocab = {t: i for i, t in enumerate(
+        ["nmos","pmos","npn","pnp","res","cap","ind","isrc","vsrc","other"]
+    )}
+    for i, d in enumerate(p["devices"]):
+        pins = d["pins"]
+        for a, b in combinations(range(len(pins)), 2):
+            na, nb = net_idx[pins[a]["net"]], net_idx[pins[b]["net"]]
+            for (s, t) in ((na, nb), (nb, na)):  # both directions
+                src.append(s); dst.append(t)
+                dev_id.append(i)
+                dev_type.append(type_vocab.get(d["type"], type_vocab["other"]))
+
+    return Data(
+        edge_index=torch.tensor([src, dst], dtype=torch.long),
+        edge_attr=torch.tensor(dev_type, dtype=torch.long).unsqueeze(1),
+        num_nodes=len(p["nets"]),
+    )
+
+graph = to_bus(ds[0]["netlist_json"])
+```
+
+### Group-aware split reproducibility
+
+Split assignment is keyed by `base_circuit_id` with `seed=42`. The dataset's `splits.json` maps every group to its split, so you can reconstruct the exact train/val/test partition locally without re-running a splitter:
+
+```python
+import json, urllib.request
+with urllib.request.urlopen(
+    "https://huggingface.co/datasets/pphilip/analog-circuits-sky130/resolve/main/splits.json"
+) as f:
+    splits = json.load(f)
+# splits["<base_circuit_id>"] == "train" / "validation" / "test"
+```
+
+## Release notes — 2026-04-21
+
+- **130,409 rows** across **49 topology families**, SKY130 only. Available in a lean `default` config and a reproducibility-focused `with_testbench` config, each with `train` / `validation` / `test` / `failed` splits.
+- Group-aware split by `base_circuit_id` (seed=42) — every structural graph and all its sweep siblings land in exactly one split, no leakage.
+- Primitive `netlist_json` column on every row — a lossless typed-pin JSON description of the circuit graph that can be projected into bipartite / bus / node-centric PyG shapes at load time (example in § How to Use).

batches.json

@@ -0,0 +1,22 @@
+{
+  "n_groups": 63354,
+  "n_rows": {
+    "failed": 2183,
+    "test": 19402,
+    "train": 89708,
+    "validation": 19116
+  },
+  "n_rows_total": 130409,
+  "seed": 42,
+  "source_counts": {
+    "_dropped_no_testbench": 4,
+    "_excluded_topologies": 399,
+    "analoggym/performance_v2": 500,
+    "analogtobi/performance_sweep20_v2": 66582,
+    "analogtobi/performance_v2": 3331,
+    "ocb/performance_v2": 60000
+  },
+  "split_by": "base_circuit_id",
+  "test_ratio": 0.15,
+  "validation_ratio": 0.15
+}

dataset_schema.md

@@ -0,0 +1,308 @@
+# Dataset Schema
+
+Per-row reference for `pphilip/analog-circuits-sky130`. Companion document to the dataset card.
+
+Three of the columns are JSON strings carrying nested structure (`sim_params`, `metrics`, `netlist_json`). This document freezes the key names and semantics within those strings so consumers can parse them with confidence.
+
+## Arrow schema
+
+Every row, every split, every source:
+
+| Column | Type | Description                                                                                     |
+|---|---|-------------------------------------------------------------------------------------------------|
+| `circuit_id` | `string` | Unique row id. Sweep siblings share a `base_circuit_id` prefix + `_sNNN` suffix.                |
+| `base_circuit_id` | `string` | Structural identity — sweep siblings of one graph share this value. Used as the split-group key. |
+| `topology` | `string` | Topology family label (one of 49 — see vocabulary below).                                       |
+| `source_dataset` | `string` | `"ocb"` / `"analogtobi"` / `"analoggym"`.                                                       |
+| `pdk` | `string` | `"sky130"` in current release                                                                   |
+| `sim_params` | `string` (JSON) | Simulation configuration + sweep point. See § sim_params.                                       |
+| `converged` | `bool` | `true` if ngspice reached a valid operating point and the requested analyses completed.         |
+| `error` | `string` | Empty `""` on converged rows; one of 7 vocabulary strings otherwise. See § error vocabulary.    |
+| `metrics` | `string` (JSON) | Testbench-type-specific measurements. See § metrics.                                            |
+| `netlist_json` | `string` (JSON) | Lossless typed-pin graph primitive. See § netlist_json.                                         |
+| `testbench_spice` | `string` (SPICE) | **Only present in the `with_testbench` config.** The exact ngspice-ready testbench that produced `metrics`. Contains a `{{SKY130_LIB}}` placeholder that consumers substitute with their local PDK `.lib` path before running ngspice. See § testbench_spice. |
+
+**Stability intent:** column additions across releases will be append-only so existing consumers don't break silently. Any column rename or removal would be flagged prominently in the release notes.
+
+## Topology vocabulary (49 families)
+
+Every row's `topology` value comes from a fixed set of 49 strings in this release. Full list + sample counts + upstream sources is in the dataset card's "Topology families" table.
+
+## `sim_params` (JSON string)
+
+Captures everything needed to re-run the exact same simulation. Parsed as:
+
+```json
+{
+  "vdd": 1.8,
+  "vth": 0.5,
+  "vov": 0.2,
+  "kp_n": 2e-4,
+  "kp_p": 8e-5,
+  "default_l": 0.5,
+  "model_map": {
+    "nmos4": "sky130_fd_pr__nfet_01v8",
+    "pmos4": "sky130_fd_pr__pfet_01v8",
+    "npn":   "sky130_fd_pr__npn_05v5_W1p00L1p00",
+    "pnp":   "sky130_fd_pr__pnp_05v5_W3p40L3p40"
+  },
+  "testbench": "OpampTestbench",
+  "convergence_opts": {},
+  "sweep": {
+    "design": {"w_scale": 1.34, "l_scale": 0.92},
+    "test":   {"ib_scale": 0.67, "cl_F": 4.2e-12}
+  }
+}
+```
+
+| Key | Type | Meaning |
+|---|---|---|
+| `vdd` | float | Supply voltage used for this sim (V). |
+| `vth` | float | Nominal MOSFET threshold voltage (V). Used by the bias-inference heuristic. |
+| `vov` | float | Nominal gate overdrive voltage (V). |
+| `kp_n`, `kp_p` | float | Nominal NMOS / PMOS transconductance parameter (A/V²). |
+| `default_l` | float | Default channel length applied when the DUT builder has no better info (µm). |
+| `model_map` | dict[str,str] | Mapping from abstract device-type token → PDK-specific subcircuit name. Captures which SKY130 model bin each MOSFET/BJT uses. |
+| `testbench` | str | One of: `OpampTestbench`, `LdoTestbench`, `BandgapTestbench`, `ComparatorTestbench`, `VcoTestbench`, `MixerTestbench`, `PaTestbench`. Determines which metric keys appear in `metrics`. |
+| `convergence_opts` | dict | Per-PDK `.option` directives (gmin, gminsteps) appended to the testbench header. Empty for SKY130 in this release. |
+| `sweep` | dict or null | Null for 1× default-sizing rows (OCB and AnalogToBi baseline); populated for LHS sweep points. |
+| `sweep.design.w_scale` | float | Multiplicative factor applied to every MOSFET W. Log-uniform over [0.3, 3.0], post-clamped to W_MAX = 500 µm. |
+| `sweep.design.l_scale` | float | Multiplicative factor applied to every MOSFET L. Log-uniform over [0.7, 1.5]. |
+| `sweep.test.ib_scale` | float | Scale applied to external `I__*` bias sources. Log-uniform over [0.3, 3.0]. |
+| `sweep.test.cl_F` | float | Absolute load capacitance (F). Log-uniform over [1e-14, 1e-10]. |
+
+**Design / test axis split** (inspired by FALCON's contribution gap): `sweep.design` modifies the DUT itself (wing geometry); `sweep.test` modifies the testbench harness (airspeed). Consumers can project the 4-D LHS down to design-only or operating-condition-only as needed.
+
+## `metrics` (JSON string)
+
+Keys depend on the testbench (`sim_params.testbench`) because different analyses emit different output signals. `dc_gain_dB` only appears on AC-based testbenches; time-domain ones emit `vout_min_V` / `vout_max_V` / `t_*_s` instead.
+
+### Key catalogue per testbench
+
+| Testbench | Always-present keys | Conditional keys | Sample rows |
+|---|---|---|---|
+| `OpampTestbench` | `dc_gain_dB`, `vdd_current_A`, `power_W` | `vout_dc_V` (98.6%), `ugf_Hz` (27.4%), `phase_at_ugf_deg` (27.4%) | 107,672 |
+| `LdoTestbench` | `vdd_current_A`, `power_W` | `dc_gain_dB` (99.1%), `vout_dc_V` (98.1%), `ugf_Hz` (1.3%) | 9,748 |
+| `BandgapTestbench` | `vdd_current_A`, `power_W` | `vout_dc_V` (96.7%) | 7,101 |
+| `VcoTestbench` | `vout_min_V`, `vout_max_V` | `vdd_current_A` (93%), `power_W` (93%), `vout_dc_V` (53%), `osc_freq_Hz` (1.8%), `t_rise1_s`, `t_rise2_s` | 2,166 |
+| `MixerTestbench` | `dc_gain_dB` | `vdd_current_A` (97%), `power_W` (97%), `vout_dc_V` (47%) | 708 |
+| `PaTestbench` | `dc_gain_dB`, `vdd_current_A`, `power_W` | `vout_dc_V` (67%), `ugf_Hz` (4.2%) | 504 |
+| `ComparatorTestbench` | `vout_min_V`, `vout_max_V`, `vdd_current_A`, `power_W` | `vout_dc_V` (85%), `t_out_cross_s` (6%) | 327 |
+
+Conditional-key percentages are measured against converged rows in this release.
+
+### Key semantics
+
+| Key | Unit | Meaning |
+|---|---|---|
+| `dc_gain_dB` | dB | Small-signal AC gain at 1 Hz. For `LdoTestbench`, this is `vdb(vout)` with `VDD AC 1` — functionally the negated PSRR (conventionally reported as the absolute value). |
+| `ugf_Hz` | Hz | Unity-gain frequency — lowest frequency at which `vdb(vout) = 0`. NaN-equivalent (key absent) if the AC sweep never crosses 0 dB. |
+| `phase_at_ugf_deg` | degrees | Phase margin proxy — phase of the AC response at `ugf_Hz`. |
+| `vout_dc_V` | V | Output node DC level from the `.op` solve. |
+| `vout_min_V`, `vout_max_V` | V | Transient output extremes over the simulated window. Used by time-domain testbenches (VCO, comparator) to detect oscillation amplitude / switching range. |
+| `vdd_current_A` | A | Current into `VDD` at the DC operating point. Sign convention: negative = sourcing (VDD → circuit → GND), which is the typical case. |
+| `power_W` | W | `abs(vdd_current_A) * vdd`. |
+| `osc_freq_Hz` | Hz | Detected oscillation frequency (VCO, oscillator). Present only when the transient produced a stable oscillation — rare at default sizing (1.8% of VCO rows). |
+| `t_rise1_s`, `t_rise2_s`, `t_out_cross_s` | s | Transient timestamp markers for switching measurements (comparator, VCO first/second zero-crossing). |
+
+### ⚠️ Known caveats on `metrics` semantics
+
+1. **Testbench-topology mismatch for non-amplifier circuits.** Most non-op-amp topologies are simulated with `OpampTestbench` (the only shipped AC testbench that fits a 2-input / 1-output pattern). Their `dc_gain_dB` is the literal small-signal AC response of the circuit, which is a real physical number, but often not the canonical metric a designer would cite for that topology. Concrete symptom: **~22% of converged rows have `|dc_gain_dB| < 0.1`**, dominated by OCB opamps with degenerate behavioural→transistor remaps (19K rows) and AnalogToBi switched-capacitor samplers (5.6K rows). Treat `dc_gain_dB` as a signal-path DC indicator, not a performance metric.
+
+2. **Missing `dc_gain_dB` is not an error.** Time-domain testbenches (`VcoTestbench`, `ComparatorTestbench`, `BandgapTestbench`) don't produce an AC gain; they emit temperature-sweep voltages, oscillation metrics, or transient edge timestamps instead. 7.6% of converged rows land in this regime.
+
+3. **Units are SI throughout** (V, A, W, Hz, s). MOSFET dimensions in `netlist_json.devices[].params` are in µm (our `ngspice` runs with `ngbehavior=hs` + `scale=1e-6`).
+
+## `netlist_json` (JSON string)
+
+Lossless typed-pin primitive — the canonical graph representation. See `scripts/pyg/schema.py` for the builder; full primitive schema:
+
+```json
+{
+  "nets": [
+    {"name": "VDD",  "role": "supply_pos", "external": true},
+    {"name": "NET1", "role": "internal",   "external": false}
+  ],
+  "devices": [
+    {"name": "M1", "type": "nmos", "model": "nmos4",
+     "pins": [{"role": "D", "net": "NET1"}, {"role": "G", "net": "VIN"},
+              {"role": "S", "net": "VSS"}, {"role": "B", "net": "VSS"}],
+     "params": {"W": 10.0, "L": 0.5}}
+  ]
+}
+```
+
+**Vocabularies** (frozen, tested in `tests/test_vocabularies.py`):
+
+- **Device types:** `nmos`, `pmos`, `npn`, `pnp`, `res`, `cap`, `ind`, `isrc`, `vsrc`, `other` (overflow).
+- **Pin roles:** `D` / `G` / `S` / `B` (MOSFET drain/gate/source/bulk), `C` / `B` / `E` / `SUB` (BJT collector/base/emitter/substrate), `P` / `N` (2-terminal positive/negative), `X` (overflow).
+- **Net roles:** `supply_pos`, `supply_neg`, `input_v`, `input_i`, `output_v`, `output_i`, `bias_voltage`, `bias_current`, `clock`, `logic`, `lo_drive`, `rf_input`, `internal`, `unknown`.
+
+Three projections live in `scripts/pyg/`:
+
+| Function | Shape | Typical use |
+|---|---|---|
+| `to_bipartite(p)` | Two node classes (devices + nets), incidence edges. | OCB-style heterogeneous GNNs. |
+| `to_bus(p)` | Nets as nodes, devices as multi-edges. | FALCON's `graph.json` shape. |
+| `to_node_centric(p)` | Devices as nodes, shared nets as edges. | Compact device-level GNNs. |
+
+Every projection carries pin-role and net-role attributes so the primitive is fully recoverable.
+
+## `testbench_spice` (SPICE text, `with_testbench` config only)
+
+The exact ngspice-ready SPICE that produced this row's `metrics`. Running `ngspice -b` on this text (after substituting the PDK path placeholder) bit-reproduces every numeric value in `metrics`.
+
+Structure (roughly, varies per testbench type):
+
+```spice
+* testbench for <circuit_id> (sky130 typical)
+.lib "{{SKY130_LIB}}" tt            ← placeholder; consumers substitute their local lib path
+
+* --- Supply ---
+VDD VDD 0 DC 1.8
+VSS VSS 0 DC 0
+
+* --- Bias (BFS + Vth/Vov) ---
+V__VB1 VB1 0 DC 0.900              ← inferred bias voltages (port-role heuristic)
+I__IB1 IB1 VSS DC 0.000050         ← inferred bias currents
+
+* --- Input ---
+VIN1 VIN1 0 DC 0.9 AC 1            ← topology-specific stimulus
+
+* --- DUT: <circuit_id> ---
+X<name> <d> <g> <s> <b> <sky130 model> W=... L=...
+...
+
+* --- Load ---
+CL VOUT 0 10p
+
+* --- Analysis ---
+.control
+op
+ac dec 20 1 1G
+meas ac dc_gain_dB find vdb(vout) at=1
+...
+quit
+.endc
+.end
+```
+
+The **only environment-specific token** is the `{{SKY130_LIB}}` placeholder — everything else is deterministic given the same circuit + ngspice version.
+
+Consumer workflow:
+
+```python
+import os
+sky130_lib = os.environ["SKY130_LIB"]
+spice = row["testbench_spice"].replace("{{SKY130_LIB}}", sky130_lib)
+# → hand to ngspice as a batch-mode input
+```
+
+`example_simulate.py` in the repo automates this. The `with_testbench` config adds ~40 MB to the default download; skip it if you only need to train on `metrics` and don't need to re-run ngspice.
+
+### Notes
+
+- **ngspice lowercases output.** `ngbehavior=hs` (which the testbench sets via `.spiceinit`) lowercases tokens during parsing. `.meas ac dc_gain_dB` prints as `dc_gain_db = …`. Parse case-insensitively.
+- **Sweep-aware deck.** Rows with `sim_params.sweep ≠ null` carry their sweep's W/L/Ibias/CL values baked into the deck. You don't need to re-apply the sweep yourself — what's in `testbench_spice` IS the sweep sample.
+- **Failed rows (`converged=false`).** The `failed` split also carries `testbench_spice` for rows where the builder succeeded but ngspice didn't converge. Re-running these with different `.option` directives or tighter initial conditions may rescue some.
+
+## `error` vocabulary
+
+Converged rows carry `error = ""`. Failed rows use exactly one of:
+
+| Value | Cause |
+|---|---|
+| `no_convergence` | ngspice DC operating point iteration hit the step limit without converging. |
+| `singular_matrix` | Jacobian was singular — typically compact-model internal parasitic nodes without a DC path to ground. |
+| `timeout` | Runner killed ngspice after `sim_params.convergence_opts`-defined timeout (60 s for sky130). |
+| `sim_error` | ngspice exited non-zero with an unclassified failure. Often a parser or model-lookup error. |
+| `no_output_port` | Testbench generator couldn't identify an output node in the netlist — structural issue, not a simulator one. |
+| `netlist_not_found` | The source `.spice` file wasn't on disk at simulation time. Shouldn't appear in the shipped release. |
+| `model_not_found` | PDK subcircuit for a device's `model` token couldn't be resolved — e.g. W/L outside BSIM4 bin coverage. |
+
+## Supported tasks
+
+Three task variants are explicitly supported by the schema. Code snippets use the unified config (`load_dataset("pphilip/analog-circuits-sky130", split="train")`).
+
+### 1. `netlist → metrics` (regression)
+
+Predict performance metrics from the circuit graph + sweep parameters.
+
+```python
+import json, torch
+from datasets import load_dataset
+from scripts.pyg import to_bus
+from torch_geometric.data import Data
+
+ds = load_dataset("pphilip/analog-circuits-sky130", split="train")
+
+def row_to_pyg(r):
+    g = to_bus(r["netlist_json"])
+    y = json.loads(r["metrics"]).get("dc_gain_dB", float("nan"))
+    return Data(
+        edge_index=torch.tensor(g["edge_index"], dtype=torch.long),
+        edge_attr=torch.tensor(g["edge_device_params"], dtype=torch.float),
+        num_nodes=g["num_nodes"],
+        y=torch.tensor([y], dtype=torch.float),
+    )
+```
+
+Filter to op-amp testbench rows first if you want a uniform target:
+
+```python
+op_ds = ds.filter(lambda r: json.loads(r["sim_params"])["testbench"] == "OpampTestbench")
+```
+
+### 2. `metrics → topology` (classification)
+
+49-class classification from the metric vector.
+
+```python
+import json
+from datasets import load_dataset
+
+TOPO_VOCAB = sorted({r["topology"] for r in load_dataset(
+    "pphilip/analog-circuits-sky130", split="train"
+)})
+TOPO_TO_IDX = {t: i for i, t in enumerate(TOPO_VOCAB)}
+
+def row_to_cls(r):
+    m = json.loads(r["metrics"])
+    features = [m.get(k, float("nan")) for k in (
+        "dc_gain_dB", "ugf_Hz", "phase_at_ugf_deg",
+        "vout_dc_V", "vdd_current_A", "power_W"
+    )]
+    return features, TOPO_TO_IDX[r["topology"]]
+```
+
+Class imbalance is extreme (55% opamp). Apply `torch.utils.data.WeightedRandomSampler` or class-weighted loss.
+
+### 3. `metrics → sizing` (inverse-design regression)
+
+Predict `W`, `L`, `I_bias` scale factors (and/or per-device sizing from `netlist_json.devices[].params`) from target metrics. Requires conditioning on topology.
+
+```python
+import json
+from datasets import load_dataset
+
+ds = load_dataset("pphilip/analog-circuits-sky130", split="train")
+# Sweep rows only — the default-sizing 1× baseline carries no sizing signal
+sweep = ds.filter(lambda r: json.loads(r["sim_params"]).get("sweep") is not None)
+
+def row_to_inverse(r):
+    sp = json.loads(r["sim_params"])
+    m = json.loads(r["metrics"])
+    target_metrics = [m.get(k, float("nan")) for k in ("dc_gain_dB", "ugf_Hz", "power_W")]
+    sizing = [
+        sp["sweep"]["design"]["w_scale"],
+        sp["sweep"]["design"]["l_scale"],
+        sp["sweep"]["test"]["ib_scale"],
+    ]
+    return target_metrics, sizing, r["topology"]
+```
+
+## Reproducibility
+
+- **Split determinism:** `base_circuit_id → split` is stored in `splits.json`. Rebuild with `scripts/build_hf_release.py --seed 42` (default).
+- **Simulation determinism:** ngspice DC / AC analyses are deterministic given the same netlist + `.option` directives. Transient solvers can diverge across versions — `sim_params` captures every parameter needed to re-run.
+- **Schema stability:** the vocabularies (`DEVICE_TYPES`, `PIN_ROLES`, `NET_ROLES`, error strings, topology families) in this release are fixed; any change in a future release would be announced in the release notes.

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+#!/usr/bin/env python3
+"""Reproduce any row of `pphilip/analog-circuits-sky130` with ngspice.
+
+Usage
+-----
+    python example_simulate.py                      # first converged row of train
+    python example_simulate.py --split test --row 42
+    python example_simulate.py --circuit-id analoggym_amp_leung_nmcf_pin_3_s000
+    python example_simulate.py --row 0 --print-spice      # dump the reconstructed SPICE
+
+Every row of the `with_testbench` config carries the exact, ngspice-ready
+SPICE that produced its `metrics`. Reproducing a row is:
+    1. Load the row.
+    2. Substitute `{{SKY130_LIB}}` with your local SKY130 `.lib` path.
+    3. Run ngspice on the result.
+    4. Parse the `.meas` output.
+
+Prerequisites
+-------------
+    pip install datasets
+    # Install ngspice (v46+):
+    #   brew install ngspice          (macOS)
+    #   apt install ngspice           (Debian/Ubuntu)
+    #   (or build from source: http://ngspice.sourceforge.net/)
+    # Install the SkyWater SKY130 PDK (Apache 2.0):
+    pip install volare && volare fetch --pdk sky130
+    # Point SKY130_LIB at the combined/continuous lib:
+    export SKY130_LIB="$(volare show sky130)/sky130A/libs.tech/combined/continuous/sky130.lib.spice"
+"""
+
+from __future__ import annotations
+
+import argparse
+import json
+import os
+import shutil
+import subprocess
+import sys
+import tempfile
+from pathlib import Path
+
+
+# ---------------------------------------------------------------------------
+# Run ngspice + parse .meas output
+# ---------------------------------------------------------------------------
+
+def run_ngspice(spice_text: str) -> tuple[dict[str, float], str]:
+    """Run ngspice in batch mode. Returns (parsed_metrics, raw_log).
+
+    ngspice's `ngbehavior=hs` mode lowercases every token, so `.meas`
+    labels come back as `dc_gain_db` even if the SPICE source wrote
+    `dc_gain_dB`. Parsing is case-insensitive.
+    """
+    if shutil.which("ngspice") is None:
+        raise RuntimeError(
+            "ngspice not found on PATH. Install it (see prerequisites above)."
+        )
+    with tempfile.TemporaryDirectory() as d:
+        tb = Path(d) / "tb.spice"
+        tb.write_text(spice_text)
+        r = subprocess.run(
+            ["ngspice", "-b", str(tb)],
+            capture_output=True, text=True, timeout=60,
+        )
+    log = r.stdout + r.stderr
+
+    # `.meas` output looks like:   dc_gain_db          =  -3.07410e+01 at=  1.00000e+00
+    metrics: dict[str, float] = {}
+    for line in log.splitlines():
+        parts = line.strip().split("=", 1)
+        if len(parts) != 2:
+            continue
+        key = parts[0].strip().lower()
+        if not key or " " in key:
+            continue
+        # Take the first numeric token after `=`
+        for tok in parts[1].split():
+            try:
+                metrics[key] = float(tok)
+                break
+            except ValueError:
+                continue
+    return metrics, log
+
+
+def first_converged_row(ds) -> int:
+    """Return the index of the first row with a non-empty testbench_spice."""
+    for i in range(len(ds)):
+        if ds[i].get("testbench_spice"):
+            return i
+    raise RuntimeError("no row with testbench_spice found in this split")
+
+
+def main() -> int:
+    ap = argparse.ArgumentParser(description=__doc__)
+    ap.add_argument("--split", default="train",
+                    choices=["train", "validation", "test", "failed"])
+    ap.add_argument("--row", type=int, default=None,
+                    help="Row index within the split (default: first usable row)")
+    ap.add_argument("--circuit-id", default=None,
+                    help="Alternative to --row: look up by exact circuit_id")
+    ap.add_argument("--print-spice", action="store_true",
+                    help="Print the reconstructed SPICE and exit without running")
+    args = ap.parse_args()
+
+    sky130_lib = os.environ.get("SKY130_LIB")
+    if not sky130_lib or not Path(sky130_lib).exists():
+        print(
+            "ERROR: SKY130_LIB env var not set or doesn't point to a valid file.\n"
+            "Install the PDK: `pip install volare && volare fetch --pdk sky130`\n"
+            "Then:             `export SKY130_LIB=<path to sky130.lib.spice>` "
+            "(combined/continuous variant).",
+            file=sys.stderr,
+        )
+        return 2
+
+    from datasets import load_dataset
+    print(f"Loading pphilip/analog-circuits-sky130 (config: with_testbench, split: {args.split})…")
+    ds = load_dataset(
+        "pphilip/analog-circuits-sky130",
+        "with_testbench",
+        split=args.split,
+    )
+
+    if args.circuit_id is not None:
+        matches = [i for i, r in enumerate(ds) if r["circuit_id"] == args.circuit_id]
+        if not matches:
+            print(f"circuit_id {args.circuit_id!r} not in split {args.split!r}",
+                  file=sys.stderr)
+            return 1
+        idx = matches[0]
+    elif args.row is not None:
+        idx = args.row
+    else:
+        idx = first_converged_row(ds)
+
+    row = ds[idx]
+    shipped = json.loads(row["metrics"]) if row["metrics"] else {}
+    spice = row["testbench_spice"]
+
+    print(f"  circuit_id:     {row['circuit_id']}")
+    print(f"  topology:       {row['topology']}  (source: {row['source_dataset']})")
+    print(f"  shipped metric: dc_gain_dB = {shipped.get('dc_gain_dB', 'n/a')} dB")
+
+    if not spice:
+        print("\n  ERROR: this row has no testbench_spice (failed-build case).",
+              file=sys.stderr)
+        return 1
+
+    # Swap the portability placeholder for the user's local PDK path.
+    spice = spice.replace("{{SKY130_LIB}}", sky130_lib)
+
+    if args.print_spice:
+        print("\n--- reconstructed SPICE ---")
+        print(spice)
+        return 0
+
+    print("\nRunning ngspice…")
+    try:
+        metrics, log = run_ngspice(spice)
+    except RuntimeError as e:
+        print(f"ERROR: {e}", file=sys.stderr)
+        return 3
+
+    reproduced = metrics.get("dc_gain_db")  # ngspice lowercases output keys
+    print(f"  reproduced: dc_gain_dB = {reproduced} dB")
+
+    if reproduced is not None and "dc_gain_dB" in shipped:
+        delta = abs(reproduced - shipped["dc_gain_dB"])
+        tag = "✓ bit-exact" if delta < 1e-3 else ("~ within 0.1 dB" if delta < 0.1 else "✗ mismatch")
+        print(f"  delta:      {delta:.6f} dB  {tag}")
+
+    return 0
+
+
+if __name__ == "__main__":
+    sys.exit(main())

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