| // This file is public domain, it can be freely copied without restrictions. | |
| // SPDX-License-Identifier: CC0-1.0 | |
| module dff ( | |
| input logic clk, d, | |
| output logic q | |
| ); | |
| always @(posedge clk) begin | |
| q <= d; | |
| end | |
| endmodule | |
| // This file is public domain, it can be freely copied without restrictions. | |
| // SPDX-License-Identifier: CC0-1.0 | |
| module dff ( | |
| input logic clk, d, | |
| output logic q | |
| ); | |
| always @(posedge clk) begin | |
| q <= d; | |
| end | |
| endmodule | |